| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [NVPTX] Fix case where a sext load of an i1 type may produce an | Justin Holewinski | 2013-05-30 | 1 | -2/+4 |
| * | Track IR ordering of SelectionDAG nodes 2/4. | Andrew Trick | 2013-05-25 | 1 | -5/+5 |
| * | [NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic | Justin Holewinski | 2013-05-21 | 1 | -0/+7 |
| * | ArrayRefize getMachineNode(). No functionality change. | Michael Liao | 2013-04-19 | 1 | -14/+14 |
| * | [NVPTX] Run clang-format on all NVPTX sources. | Justin Holewinski | 2013-03-30 | 1 | -491/+956 |
| * | [NVPTX] Disable vector registers | Justin Holewinski | 2013-02-12 | 1 | -112/+697 |
| * | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth | 2013-01-02 | 1 | -2/+2 |
| * | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 | 1 | -4/+4 |
| * | NVPTX: Initialize the UseF32FTZ flag. | Benjamin Kramer | 2012-05-05 | 1 | -0/+2 |
| * | This patch adds a new NVPTX back-end to LLVM which supports code generation f... | Justin Holewinski | 2012-05-04 | 1 | -0/+681 |
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