| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [NVPTX] Add isel patterns for [reg+offset] form of ldg/ldu. | Justin Holewinski | 2013-07-01 | 1 | -15/+51 |
| * | [NVPTX] Clean up comparison/select/convert patterns and factor out PTX instru... | Justin Holewinski | 2013-06-28 | 1 | -262/+268 |
| * | [NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rath... | Justin Holewinski | 2013-06-28 | 1 | -8/+28 |
| * | [NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic | Justin Holewinski | 2013-05-21 | 1 | -0/+10 |
| * | [NVPTX] Add GenericToNVVM IR converter to better handle idiomatic LLVM IR inputs | Justin Holewinski | 2013-05-20 | 1 | -28/+2 |
| * | [NVPTX] Disable vector registers | Justin Holewinski | 2013-02-12 | 1 | -42/+103 |
| * | This patch adds a new NVPTX back-end to LLVM which supports code generation f... | Justin Holewinski | 2012-05-04 | 1 | -0/+1675 |
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