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* Rename some subtarget features. A CPU now can *have* 64-bit instructions,Chris Lattner2006-06-161-3/+3
* getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.Evan Cheng2006-05-181-9/+0
* Remove PointerType from class TargetEvan Cheng2006-05-171-3/+0
* add callee saved vector regsChris Lattner2006-03-161-1/+2
* Mark instructions that are cracked by the PPC970 decoder as such.Chris Lattner2006-03-131-3/+2
* Several big changes:Chris Lattner2006-03-121-3/+18
* Add a subtarget feature for the stfiwx instruction. I know the G5 has it,Chris Lattner2006-02-281-2/+4
* Subtarget feature can now set any variable to any valueEvan Cheng2006-01-271-5/+5
* Add attribute name and type to SubtargetFeatures.Jim Laskey2005-10-261-5/+5
* mark this as betaChris Lattner2005-10-231-1/+1
* rearrange things a bit so that instructions can use subtarget features in theChris Lattner2005-10-231-11/+9
* improve -help outputChris Lattner2005-10-231-5/+5
* Add g3 back to the mix and reorder to irritate them anal folk. Actually, it'sJim Laskey2005-10-221-9/+10
* 64-bit reg support should not be enabled by default, as support isn't complete.Chris Lattner2005-10-211-2/+2
* Plugin new subtarget backend into the build.Jim Laskey2005-10-211-18/+25
* Added InstrSchedClass to each of the PowerPC Instructions.Jim Laskey2005-10-191-0/+37
* Rename PowerPC*.td -> PPC*.tdChris Lattner2005-10-141-2/+2
* Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.tdChris Lattner2005-10-141-0/+38
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