| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -3/+3 |
| * | Remove ABI-duplicated call instruction patterns. | Ulrich Weigand | 2013-03-22 | 1 | -1/+1 |
| * | Fix dynamic linking on PPC64. | Hal Finkel | 2012-03-31 | 1 | -17/+16 |
| * | Ensure that the nop that should follow a bl call in PPC64 ELF actually does | Hal Finkel | 2011-12-15 | 1 | -0/+11 |
| * | remove unneeded FIXME comment | Hal Finkel | 2011-12-02 | 1 | -1/+0 |
| * | update PPC 940 hazard rec. to function in postRA mode | Hal Finkel | 2011-12-02 | 1 | -126/+41 |
| * | Add PPC 440 scheduler and some associated tests | Hal Finkel | 2011-10-17 | 1 | -0/+13 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -4/+4 |
| * | Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant. | Roman Divacky | 2011-06-03 | 1 | -1/+1 |
| * | Various bits of framework needed for precise machine-level selection | Andrew Trick | 2010-12-24 | 1 | -1/+3 |
| * | whitespace | Andrew Trick | 2010-12-24 | 1 | -24/+24 |
| * | flags -> glue for selectiondag | Chris Lattner | 2010-12-23 | 1 | -2/+2 |
| * | Reapply r105521, this time appending "LLU" to 64 bit | Bruno Cardoso Lopes | 2010-06-08 | 1 | -1/+1 |
| * | revert r105521, which is breaking the buildbots with stuff like this: | Chris Lattner | 2010-06-05 | 1 | -1/+1 |
| * | Initial AVX support for some instructions. No patterns matched | Bruno Cardoso Lopes | 2010-06-05 | 1 | -1/+1 |
| * | remove a bogus pattern, which had the same pattern as STDU | Chris Lattner | 2010-02-27 | 1 | -1/+1 |
| * | Fix "the the" and similar typos. | Dan Gohman | 2010-02-10 | 1 | -1/+1 |
| * | eliminate the last DOUTs from the targets. | Chris Lattner | 2009-08-23 | 1 | -1/+2 |
| * | llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. | Torok Edwin | 2009-07-14 | 1 | -3/+3 |
| * | assert(0) -> LLVM_UNREACHABLE. | Torok Edwin | 2009-07-11 | 1 | -3/+4 |
| * | Refactor ABI code in the PowerPC backend. | Tilmann Scheller | 2009-07-03 | 1 | -1/+1 |
| * | Initial hazard recognizer support in post-pass scheduling. This includes | Dan Gohman | 2009-01-16 | 1 | -4/+0 |
| * | Generalize the HazardRecognizer interface so that it can be used | Dan Gohman | 2009-01-15 | 1 | -3/+6 |
| * | Add a sanity-check to tablegen to catch the case where isSimpleLoad | Dan Gohman | 2008-12-03 | 1 | -1/+1 |
| * | Rename ConstantSDNode::getValue to getZExtValue, for consistency | Dan Gohman | 2008-09-12 | 1 | -2/+2 |
| * | Rename SDOperand to SDValue. | Dan Gohman | 2008-07-27 | 1 | -1/+1 |
| * | Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk | Dan Gohman | 2008-07-17 | 1 | -4/+4 |
| * | rename TargetInstrDescriptor -> TargetInstrDesc. | Chris Lattner | 2008-01-07 | 1 | -1/+1 |
| * | use predicate. | Chris Lattner | 2008-01-07 | 1 | -1/+1 |
| * | rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. | Chris Lattner | 2008-01-06 | 1 | -1/+1 |
| * | rename isStore -> mayStore to more accurately reflect what it captures. | Chris Lattner | 2008-01-06 | 1 | -1/+1 |
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| * | LVXL and STVXL are also a load and store resp. | Bill Wendling | 2007-09-05 | 1 | -0/+2 |
| * | Skeleton of post-RA scheduler; doesn't do anything yet. | Dale Johannesen | 2007-07-13 | 1 | -1/+1 |
| * | Fix parenthesis for BCTRL_{ELF|Macho} test. | Nicolas Geoffray | 2007-02-27 | 1 | -1/+1 |
| * | implement support for the linux/ppc function call ABI. Patch by | Chris Lattner | 2007-02-25 | 1 | -1/+1 |
| * | What should be the last unnecessary <iostream>s in the library. | Bill Wendling | 2006-12-07 | 1 | -3/+1 |
| * | add ppc64 r+i stores with update. | Chris Lattner | 2006-11-16 | 1 | -14/+13 |
| * | Switch loads over to use memri as the operand instead of a reg/imm operand | Chris Lattner | 2006-11-15 | 1 | -6/+5 |
| * | teach the g5 hazard recognizer about update loads. This fixes | Chris Lattner | 2006-11-13 | 1 | -11/+10 |
| * | Add missing PPC64 extload/truncstores | Chris Lattner | 2006-07-14 | 1 | -2/+16 |
| * | Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps | Chris Lattner | 2006-07-10 | 1 | -0/+4 |
| * | When possible, custom lower 32-bit SINT_TO_FP to this: | Chris Lattner | 2006-03-22 | 1 | -1/+2 |
| * | Fix a couple of bugs that broke the alpha tester build | Chris Lattner | 2006-03-13 | 1 | -2/+2 |
| * | Handle cracked instructions in dispatch group formation. | Chris Lattner | 2006-03-13 | 1 | -14/+27 |
| * | Several big changes: | Chris Lattner | 2006-03-12 | 1 | -137/+145 |
| * | blr is a branch too | Chris Lattner | 2006-03-11 | 1 | -0/+1 |
| * | Change the interface for getting a target HazardRecognizer to be more clean. | Chris Lattner | 2006-03-08 | 1 | -6/+4 |
| * | add another missing store. | Chris Lattner | 2006-03-07 | 1 | -0/+2 |
| * | add a couple more load/store instrs, add a newline to the end of file. | Chris Lattner | 2006-03-07 | 1 | -1/+15 |
