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path: root/lib/Target/PowerPC/PPCInstr64Bit.td
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* [PowerPC] Add predicted forms of branchesUlrich Weigand2013-06-241-2/+2
* [PowerPC] Support absolute branchesUlrich Weigand2013-06-241-4/+4
* [PowerPC] Remove symbolLo/symbolHi instruction operand typesUlrich Weigand2013-05-231-22/+13
* [PowerPC] Clean up generation of ha16() / lo16() markersUlrich Weigand2013-05-231-2/+2
* Change some PowerPC PatLeaf definitions to ImmLeaf for fast-isel.Bill Schmidt2013-05-221-4/+4
* Rename PPC MTCTRse to MTCTRloopHal Finkel2013-05-201-3/+3
* [PowerPC] Fix hi/lo encoding in old-style code emitterUlrich Weigand2013-05-171-2/+2
* Implement PPC counter loops as a late IR-level passHal Finkel2013-05-151-0/+6
* [PowerPC] Add assembler parserUlrich Weigand2013-05-031-0/+4
* PowerPC: Use RegisterOperand instead of RegisterClass operandsUlrich Weigand2013-04-261-145/+145
* PowerPC: Fix encoding of rldimi and rldcl instructionsUlrich Weigand2013-04-261-3/+3
* PowerPC: Mark some more patterns as isCodeGenOnly.Ulrich Weigand2013-04-171-0/+3
* Mark all PPC comparison instructions as not having side effectsHal Finkel2013-04-151-8/+10
* Mark all PPC CR registers to be spilled as live-in and tag MFCR appropriatelyHal Finkel2013-04-131-5/+1
* PPC: Remove (broken) nested implicit definition listsHal Finkel2013-04-121-35/+32
* Add PPC instruction record forms and associated query functionsHal Finkel2013-04-121-163/+191
* PPC: Prep for if conversion of bctr[l]Hal Finkel2013-04-101-1/+9
* Allow PPC B and BLR to be if-converted into some predicated formsHal Finkel2013-04-091-0/+9
* PPC rotate instructions don't have unmodeled side effctsHal Finkel2013-04-071-1/+3
* Most PPC M[TF]CR instructions do not have side effectsHal Finkel2013-04-071-1/+8
* PPC pre-increment load instructions do not have side effectsHal Finkel2013-04-071-2/+3
* PPC pre-increment load instructions do not have side effectsHal Finkel2013-04-071-2/+2
* PPC ISEL is a select and never has side effectsHal Finkel2013-04-061-0/+1
* Add more PPC floating-point conversion instructionsHal Finkel2013-04-011-0/+16
* Add the PPC popcntw instructionHal Finkel2013-04-011-0/+7
* Cleanup PPC(64) i32 -> float/double conversionHal Finkel2013-03-311-13/+0
* Add the PPC64 ldbrx/stdbrx instructionsHal Finkel2013-03-281-1/+9
* Add the PPC64 popcntd instructionHal Finkel2013-03-281-0/+3
* Fix typo in PPCInstr64BitHal Finkel2013-03-281-1/+1
* Use the PPC no-r0 class on the TOC LD pseudosHal Finkel2013-03-271-2/+2
* Apply the no-r0 class to PPC TOC ADDI[S] pseudo instructionsHal Finkel2013-03-271-9/+9
* PowerPC: Mark patterns as isCodeGenOnly.Ulrich Weigand2013-03-261-3/+7
* PowerPC: Remove LDrs pattern.Ulrich Weigand2013-03-261-8/+0
* PowerPC: Remove ADDIL patterns.Ulrich Weigand2013-03-261-5/+2
* PowerPC: Use CCBITRC operand for ISEL patterns.Ulrich Weigand2013-03-261-1/+1
* PowerPC: Move some 64-bit branch patterns.Ulrich Weigand2013-03-261-17/+18
* Use direct types in PowerPC instruction patterns.Ulrich Weigand2013-03-251-122/+120
* Use direct types in PowerPC Pat patterns.Ulrich Weigand2013-03-251-53/+53
* Remove ABI-duplicated call instruction patterns.Ulrich Weigand2013-03-221-59/+24
* Rename memrr ptrreg and offreg components.Ulrich Weigand2013-03-221-10/+10
* Fix swapped BasePtr and Offset in pre-inc memory addresses.Ulrich Weigand2013-03-221-8/+8
* Remove the xaddroff ComplexPattern.Ulrich Weigand2013-03-221-8/+8
* Fix a register-class comparison bug in PPCCTRLoopsHal Finkel2013-03-211-9/+0
* Implement builtin_{setjmp/longjmp} on PPCHal Finkel2013-03-211-0/+13
* Add missing mayLoad flag to LHAUX8 and LWAUX.Ulrich Weigand2013-03-191-1/+2
* Rewrite LHAU8 pattern to use standard memory operand.Ulrich Weigand2013-03-191-4/+4
* Rewrite pre-increment store patterns to use standard memory operands.Ulrich Weigand2013-03-191-72/+54
* Fix sub-operand size mismatch in tocentry operands.Ulrich Weigand2013-03-191-1/+1
* Prepare to make r0 an allocatable register on PPCHal Finkel2013-03-191-48/+58
* Cleanup PPC64 unaligned i64 load/storeHal Finkel2013-03-191-4/+0
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