| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | convert PPC::BCC to use the 'pred' operand instead of separate predicate | Chris Lattner | 2006-11-17 | 1 | -3/+3 |
| * | rename PPC::COND_BRANCH to PPC::BCC | Chris Lattner | 2006-11-17 | 1 | -7/+7 |
| * | start using PPC predicates more consistently. | Chris Lattner | 2006-11-17 | 1 | -1/+2 |
| * | Properly transfer kill / dead info. | Evan Cheng | 2006-11-15 | 1 | -0/+10 |
| * | Matches MachineInstr changes. | Evan Cheng | 2006-11-13 | 1 | -1/+1 |
| * | implement the BlockHasNoFallThrough hook | Chris Lattner | 2006-10-28 | 1 | -0/+11 |
| * | Implement support for branch reversal, fix a bug in branch analysis. | Chris Lattner | 2006-10-21 | 1 | -2/+5 |
| * | Simplify code, no functionality change | Chris Lattner | 2006-10-21 | 1 | -4/+2 |
| * | implement support for inserting a cond branch | Chris Lattner | 2006-10-21 | 1 | -4/+8 |
| * | add support for inserting an uncond branch | Chris Lattner | 2006-10-17 | 1 | -2/+8 |
| * | implement branch inspection/modification methods. | Chris Lattner | 2006-10-13 | 1 | -0/+93 |
| * | In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones. | Chris Lattner | 2006-07-11 | 1 | -1/+2 |
| * | Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file | Chris Lattner | 2006-06-20 | 1 | -1/+1 |
| * | Implement the getPointerRegClass method, which is required for the ptr_rc | Chris Lattner | 2006-06-17 | 1 | -3/+13 |
| * | Move some methods out of MachineInstr into MachineOperand | Chris Lattner | 2006-05-04 | 1 | -2/+2 |
| * | teach the ppc backend how to spill/reload vector regs | Chris Lattner | 2006-03-16 | 1 | -1/+1 |
| * | Add support for copying registers. still needed: spilling and reloading them | Chris Lattner | 2006-03-16 | 1 | -1/+1 |
| * | implement TII::insertNoop | Chris Lattner | 2006-03-05 | 1 | -0/+5 |
| * | add 64b gpr store to the possible list of isStoreToStackSlot opcodes. | Nate Begeman | 2006-02-02 | 1 | -1/+1 |
| * | implement isStoreToStackSlot for PPC | Chris Lattner | 2006-02-02 | 1 | -1/+18 |
| * | Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far ... | Chris Lattner | 2006-02-02 | 1 | -0/+19 |
| * | teach ppc backend these are copies | Chris Lattner | 2005-10-19 | 1 | -1/+2 |
| * | First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is | Nate Begeman | 2005-10-18 | 1 | -1/+1 |
| * | More PPC32 -> PPC changes, as well as merging some classes that were | Nate Begeman | 2005-10-16 | 1 | -6/+6 |
| * | Rename PPC32*.h to PPC*.h | Chris Lattner | 2005-10-14 | 1 | -1/+1 |
| * | Rename PowerPC*.h to PPC*.h | Chris Lattner | 2005-10-14 | 1 | -1/+1 |
| * | Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td | Chris Lattner | 2005-10-14 | 1 | -2/+2 |
| * | Fix a CQ regression from my patch to split F32/F64 into seperate register | Chris Lattner | 2005-10-07 | 1 | -1/+2 |
| * | Modify the ppc backend to use two register classes for FP: F8RC and F4RC. | Chris Lattner | 2005-10-01 | 1 | -1/+1 |
| * | Teach the code generator that rlwimi is commutable if the rotate amount | Chris Lattner | 2005-09-09 | 1 | -0/+32 |
| * | Remove trailing whitespace | Misha Brukman | 2005-04-21 | 1 | -2/+2 |
| * | Initial support for allocation condition registers | Nate Begeman | 2005-04-12 | 1 | -0/+8 |
| * | Add ori reg, reg, 0 as a move instruction. This can be generated from | Nate Begeman | 2004-10-07 | 1 | -0/+11 |
| * | PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* | Misha Brukman | 2004-08-17 | 1 | -0/+59 |
