| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Implement PPCInstrInfo::isCoalescableExtInstr(). | Jakob Stoklund Olesen | 2012-06-19 | 1 | -0/+16 |
| * | Enable PPC CTR loop formation by default. | Hal Finkel | 2012-06-08 | 1 | -6/+6 |
| * | Disable the PPC CTR-Loops pass by default. | Hal Finkel | 2012-06-08 | 1 | -0/+12 |
| * | Add the PPCCTRLoops pass: a PPC machine-code-level optimization pass to form ... | Hal Finkel | 2012-06-08 | 1 | -6/+71 |
| * | Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change s... | Craig Topper | 2012-04-20 | 1 | -16/+16 |
| * | Add instruction itinerary for the PPC64 A2 core. | Hal Finkel | 2012-04-01 | 1 | -3/+4 |
| * | Fix dynamic linking on PPC64. | Hal Finkel | 2012-03-31 | 1 | -1/+4 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | make CR spill and restore 64-bit clean (no functional change), and fix some o... | Hal Finkel | 2011-12-07 | 1 | -5/+11 |
| * | 64-bit LR8 load should use X11 not R11 | Hal Finkel | 2011-12-07 | 1 | -3/+3 |
| * | add RESTORE_CR and support CR unspills | Hal Finkel | 2011-12-06 | 1 | -23/+36 |
| * | enable PPC register scavenging by default (update tests and remove some FIXMEs) | Hal Finkel | 2011-12-05 | 1 | -5/+5 |
| * | update PPC 940 hazard rec. to function in postRA mode | Hal Finkel | 2011-12-02 | 1 | -12/+19 |
| * | add basic PPC register-pressure feedback; adjust the vaarg test to match the ... | Hal Finkel | 2011-11-22 | 1 | -5/+2 |
| * | Make use of MachinePointerInfo::getFixedStack. This removes all mention | Jay Foad | 2011-11-15 | 1 | -5/+2 |
| * | PPCInstrInfo.cpp: Fix one "unused" warning. | NAKAMURA Takumi | 2011-11-08 | 1 | -0/+1 |
| * | Fix unused variable warning. | Richard Smith | 2011-10-21 | 1 | -1/+1 |
| * | Disable the PPC hazard recognizer. It currently only supports | Dan Gohman | 2011-10-20 | 1 | -2/+8 |
| * | Add PPC 440 scheduler and some associated tests | Hal Finkel | 2011-10-17 | 1 | -1/+9 |
| * | Teach PPCInstrInfo to handle sub-classes. | Jakob Stoklund Olesen | 2011-10-04 | 1 | -14/+14 |
| * | Move TargetRegistry and TargetSelect from Target to Support where they belong. | Evan Cheng | 2011-08-24 | 1 | -1/+1 |
| * | Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsm... | Evan Cheng | 2011-07-26 | 1 | -1/+1 |
| * | Refactor PPC target to separate MC routines from Target routines. | Evan Cheng | 2011-07-25 | 1 | -2/+2 |
| * | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 1 | -12/+0 |
| * | - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo | Evan Cheng | 2011-07-11 | 1 | -2/+15 |
| * | Hide the call to InitMCInstrInfo into tblgen generated ctor. | Evan Cheng | 2011-07-01 | 1 | -2/+2 |
| * | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng | 2011-06-28 | 1 | -2/+3 |
| * | Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc | Evan Cheng | 2011-06-28 | 1 | -1/+3 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -5/+5 |
| * | Various bits of framework needed for precise machine-level selection | Andrew Trick | 2010-12-24 | 1 | -0/+13 |
| * | whitespace | Andrew Trick | 2010-12-24 | 1 | -29/+29 |
| * | convert targets to the new MF.getMachineMemOperand interface. | Chris Lattner | 2010-09-21 | 1 | -4/+6 |
| * | Remove the isMoveInstr() hook. | Jakob Stoklund Olesen | 2010-07-16 | 1 | -61/+0 |
| * | Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and | Bill Wendling | 2010-07-16 | 1 | -1/+1 |
| * | Emit COPY instead of FMR/FMSD instructions for floating point conversion on | Jakob Stoklund Olesen | 2010-07-16 | 1 | -1/+1 |
| * | Teach PPCInstrInfo::storeRegToStackSlot and loadRegFromStackSlot to add memory | Jakob Stoklund Olesen | 2010-07-16 | 1 | -0/+19 |
| * | RISC architectures get their memory operand folding for free. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -115/+0 |
| * | Replace copyRegToReg with copyPhysReg for PowerPC. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -30/+26 |
| * | Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This | Stuart Hastings | 2010-06-17 | 1 | -7/+6 |
| * | The PPC MFCR instruction implicitly uses all 8 of the CR | Dale Johannesen | 2010-05-20 | 1 | -1/+2 |
| * | Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it | Dan Gohman | 2010-05-06 | 1 | -4/+2 |
| * | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng | 2010-05-06 | 1 | -2/+4 |
| * | No-ops emitted for scheduling don't correspond with anything in the | Dan Gohman | 2010-05-05 | 1 | -2/+0 |
| * | Frame index can be negative. | Evan Cheng | 2010-04-29 | 1 | -1/+1 |
| * | Add PPC specific emitFrameIndexDebugValue. | Evan Cheng | 2010-04-26 | 1 | -0/+10 |
| * | EnablePPC64RS and EnablePPC32RS are used in multiple files, so they | Dan Gohman | 2010-04-15 | 1 | -1/+4 |
| * | Educate GetInstrSizeInBytes implementations that | Dale Johannesen | 2010-04-07 | 1 | -0/+1 |
| * | use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() | Chris Lattner | 2010-04-02 | 1 | -5/+5 |
| * | Teach AnalyzeBranch, RemoveBranch and the branch | Dale Johannesen | 2010-04-02 | 1 | -1/+14 |
| * | Merge PPC instructions FMRS and FMRD into a single FMR instruction. | Jakob Stoklund Olesen | 2010-02-26 | 1 | -8/+6 |
