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path: root/lib/Target/PowerPC/PPCScheduleG5.td
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* Split several PPC instruction classes.Hal Finkel2012-08-281-1/+9
* Split out the PPC instruction class IntSimple from IntGeneral.Hal Finkel2012-06-121-0/+1
* Split the LdStGeneral PPC itin. class into LdStLoad and LdStStore.Hal Finkel2012-04-011-1/+2
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-3/+3
* Add support to model pipeline bypass / forwarding.Evan Cheng2010-09-281-1/+1
* Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov2010-04-181-1/+2
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* Added InstrSchedClass to each of the PowerPC Instructions.Jim Laskey2005-10-191-3/+3
* Push processor descriptions to the top of target and add command line info.Jim Laskey2005-10-191-1/+1
* Simple edits; remove unimplimented cases and clarify long haul SLU cases.Jim Laskey2005-10-181-8/+3
* Checking in first round of scheduling tablegen files. Not tied in as yet.Jim Laskey2005-10-181-0/+88