external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	R600: Add IsExport bit to TableGen instruction definitions	Tom Stellard	2013-08-16	1	-9/+4
*	R600: Change the RAT instruction assembly names so they match the docs	Tom Stellard	2013-08-16	1	-2/+2
*	R600: Add 64-bit float load/store support	Tom Stellard	2013-08-01	1	-1/+3
*	R600: Remove predicated_break inst	Vincent Lejeune	2013-07-31	1	-9/+2
*	R600: Don't emit empty then clause and use alu_pop_after	Vincent Lejeune	2013-07-19	1	-9/+39
*	Make some arrays 'static const'	Craig Topper	2013-07-15	1	-1/+1
*	R600: Do not predicated basic block with multiple alu clause	Vincent Lejeune	2013-07-09	1	-0/+2
*	R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman	Tom Stellard	2013-06-14	1	-0/+1
*	R600: Anti dep better handled in tex clause	Vincent Lejeune	2013-06-07	1	-6/+4
*	R600: Rework subtarget info and remove AMDILDevice classes	Tom Stellard	2013-06-07	1	-6/+8
*	Don't cache the instruction and register info from the TargetMachine, because	Bill Wendling	2013-06-07	1	-7/+9
*	R600: CALL_FS consumes a stack size entry	Vincent Lejeune	2013-06-03	1	-0/+1
*	R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg	Tom Stellard	2013-05-23	1	-2/+9
*	Move passes from namespace llvm into anonymous namespaces. Sort includes whil...	Benjamin Kramer	2013-05-23	1	-4/+5
*	Setting the default value (fixes CRT assertions about uninitialized variable ...	Aaron Ballman	2013-05-23	1	-3/+3
*	R600: Some factorization	Vincent Lejeune	2013-05-17	1	-9/+7
*	R600: Factorize Fetch size limit inside AMDGPUSubTarget	Vincent Lejeune	2013-05-17	1	-5/+2
*	R600: Signed literals are 64bits wide	Vincent Lejeune	2013-05-02	1	-3/+3
*	R600: use native for alu	Vincent Lejeune	2013-04-30	1	-1/+109
*	R600: Take inner dependency into tex/vtx clauses	Vincent Lejeune	2013-04-30	1	-0/+34
*	R600: Turn TEX/VTX into native instructions	Vincent Lejeune	2013-04-30	1	-10/+31
*	R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions	Vincent Lejeune	2013-04-30	1	-36/+9
*	R600: Use correct CF_END instruction on Northern Island GPUs	Tom Stellard	2013-04-29	1	-1/+1
*	R600: Use .AMDGPU.config section to emit stacksize	Vincent Lejeune	2013-04-23	1	-5/+21
*	R600: Add CF_END	Vincent Lejeune	2013-04-23	1	-42/+49
*	R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable]	NAKAMURA Takumi	2013-04-11	1	-0/+1
*	Whitespace.	NAKAMURA Takumi	2013-04-11	1	-2/+1
*	R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addr	Vincent Lejeune	2013-04-10	1	-1/+10
*	R600: Control Flow support for pre EG gen	Vincent Lejeune	2013-04-08	1	-12/+72
*	R600: Fix wrong address when substituting ENDIF	Vincent Lejeune	2013-04-04	1	-1/+1
*	R600: Take export into account when computing cf address	Vincent Lejeune	2013-04-04	1	-0/+4
*	R600: Simplify data structure and add DEBUG to R600ControlFlowFinalizer	Vincent Lejeune	2013-04-03	1	-20/+21
*	R600: Consider KILLGT as an ALU instruction	Vincent Lejeune	2013-04-03	1	-1/+0
*	R600: Add support for native control flow	Vincent Lejeune	2013-04-01	1	-0/+264