external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	Update aosp/master LLVM for rebase to r230699.	Stephen Hines	2015-03-23	1	-4/+3
*	Update aosp/master LLVM for rebase to r222494.	Stephen Hines	2014-12-02	1	-15/+18
*	Update LLVM for rebase to r212749.	Stephen Hines	2014-07-21	1	-0/+1
*	Update LLVM for 3.5 rebase (r209712).	Stephen Hines	2014-05-29	1	-7/+7
*	Update to LLVM 3.5a.	Stephen Hines	2014-04-24	1	-4/+3
*	R600: Fix scheduling of instructions that use the LDS output queue	Tom Stellard	2013-11-15	1	-32/+0
*	R600: Don't use trans slot for instructions that read LDS source registers	Tom Stellard	2013-09-12	1	-0/+4
*	R600: Non vector only instruction can be scheduled on trans unit	Vincent Lejeune	2013-09-04	1	-12/+21
*	Revert "R600: Non vector only instruction can be scheduled on trans unit"	Tom Stellard	2013-07-31	1	-21/+12
*	R600: Non vector only instruction can be scheduled on trans unit	Vincent Lejeune	2013-07-31	1	-12/+21
*	R600: Support schedule and packetization of trans-only inst	Vincent Lejeune	2013-06-29	1	-7/+18
*	R600: Add local memory support via LDS	Tom Stellard	2013-06-28	1	-2/+10
*	R600: Add support for GROUP_BARRIER instruction	Tom Stellard	2013-06-28	1	-1/+5
*	R600: Use a refined heuristic to choose when switching clause	Vincent Lejeune	2013-06-07	1	-9/+43
*	R600: Rework subtarget info and remove AMDILDevice classes	Tom Stellard	2013-06-07	1	-0/+1
*	R600: Remove leftover code in R600MachineScheduler.cpp	Vincent Lejeune	2013-06-06	1	-16/+0
*	R600: Schedule copy from phys register at beginning of block	Vincent Lejeune	2013-06-05	1	-1/+31
*	R600: Make sure to schedule AR register uses and defs in the same clause	Tom Stellard	2013-06-05	1	-2/+34
*	Move passes from namespace llvm into anonymous namespaces. Sort includes whil...	Benjamin Kramer	2013-05-23	1	-1/+1
*	R600: Use bottom up scheduling algorithm	Vincent Lejeune	2013-05-17	1	-23/+28
*	R600: Use depth first scheduling algorithm	Vincent Lejeune	2013-05-17	1	-52/+26
*	R600: Replace big texture opcode switch in scheduler by usesTC/usesVC	Vincent Lejeune	2013-05-17	1	-23/+3
*	R600: Relax some vector constraints on Dot4.	Vincent Lejeune	2013-05-17	1	-2/+2
*	R600: Factorize Fetch size limit inside AMDGPUSubTarget	Vincent Lejeune	2013-05-17	1	-8/+4
*	R600: Factorize maximum alu per clause in a single location	Vincent Lejeune	2013-04-03	1	-1/+1
*	R600: Factorize code handling Const Read Port limitation	Vincent Lejeune	2013-03-14	1	-68/+7
*	R600MachineScheduler.cpp: Fix use cases of dbgs(). Don't include <iostream> h...	NAKAMURA Takumi	2013-03-11	1	-1/+2
*	R600: initial scheduler code	Vincent Lejeune	2013-03-05	1	-0/+487