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Target
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R600
/
R600MachineScheduler.h
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Author
Age
Files
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*
R600: Non vector only instruction can be scheduled on trans unit
Vincent Lejeune
2013-09-04
1
-2
/
+3
*
Revert "R600: Non vector only instruction can be scheduled on trans unit"
Tom Stellard
2013-07-31
1
-3
/
+2
*
R600: Non vector only instruction can be scheduled on trans unit
Vincent Lejeune
2013-07-31
1
-2
/
+3
*
R600: Support schedule and packetization of trans-only inst
Vincent Lejeune
2013-06-29
1
-0
/
+1
*
R600: Use a refined heuristic to choose when switching clause
Vincent Lejeune
2013-06-07
1
-1
/
+4
*
R600: Schedule copy from phys register at beginning of block
Vincent Lejeune
2013-06-05
1
-0
/
+1
*
R600: Make sure to schedule AR register uses and defs in the same clause
Tom Stellard
2013-06-05
1
-0
/
+2
*
Move passes from namespace llvm into anonymous namespaces. Sort includes whil...
Benjamin Kramer
2013-05-23
1
-1
/
+1
*
R600: Use bottom up scheduling algorithm
Vincent Lejeune
2013-05-17
1
-1
/
+1
*
R600: Use depth first scheduling algorithm
Vincent Lejeune
2013-05-17
1
-27
/
+5
*
R600: Factorize code handling Const Read Port limitation
Vincent Lejeune
2013-03-14
1
-2
/
+1
*
R600: initial scheduler code
Vincent Lejeune
2013-03-05
1
-0
/
+121