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path: root/lib/Target/R600/R600Packetizer.cpp
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* Revert "R600: Non vector only instruction can be scheduled on trans unit"Tom Stellard2013-07-311-33/+5
* R600: Non vector only instruction can be scheduled on trans unitVincent Lejeune2013-07-311-5/+33
* R600: Don't mix LDS and non-LDS instructions in the same groupVincent Lejeune2013-07-311-0/+4
* R600: Do not predicated basic block with multiple alu clauseVincent Lejeune2013-07-091-1/+2
* R600: Support schedule and packetization of trans-only instVincent Lejeune2013-06-291-34/+56
* R600: Add local memory support via LDSTom Stellard2013-06-281-0/+3
* R600: Add support for GROUP_BARRIER instructionTom Stellard2013-06-281-1/+7
* R600: Use new getNamedOperandIdx function generated by TableGenTom Stellard2013-06-251-9/+9
* R600: 3 op instructions have no write bit but the result are store in PVVincent Lejeune2013-06-031-3/+1
* Move passes from namespace llvm into anonymous namespaces. Sort includes whil...Benjamin Kramer2013-05-231-12/+9
* R600: Relax some vector constraints on Dot4.Vincent Lejeune2013-05-171-1/+2
* R600: Some factorizationVincent Lejeune2013-05-171-138/+11
* R600: If previous bundle is dot4, PV valid chan is always XVincent Lejeune2013-05-021-38/+51
* R600: Packetize instructionsVincent Lejeune2013-04-301-0/+446