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path: root/lib/Target/R600/SIRegisterInfo.cpp
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* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-6/+12
* Update to LLVM 3.5a.Stephen Hines2014-04-241-2/+2
* R600/SI: Fix moveToVALU when the first operand is VSrc.Matt Arsenault2013-11-181-0/+2
* R600/SI: Add VReg_96 register class to SIRegisterInfo::hasVGPRs()Tom Stellard2013-11-151-0/+1
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-131-0/+8
* R600/SI: Prefer SALU instructions for bit shift operationsTom Stellard2013-11-131-6/+42
* Make method staticMatt Arsenault2013-11-101-1/+1
* R600/SI: Mark the EXEC register as reservedTom Stellard2013-10-101-0/+1
* R600/SI: Choose the correct MOV instruction for copying immediatesTom Stellard2013-08-141-0/+11
* R600/SI: Add more special cases for opcodes to ensureSRegLimit()Tom Stellard2013-08-061-0/+21
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-5/+3
* R600/SI: switch back to RegPressure schedulingChristian Konig2013-03-261-0/+5
* Add R600 backendTom Stellard2012-12-111-0/+48