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lib
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Target
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R600
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SIRegisterInfo.cpp
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Author
Age
Files
Lines
*
Update LLVM for 3.5 rebase (r209712).
Stephen Hines
2014-05-29
1
-6
/
+12
*
Update to LLVM 3.5a.
Stephen Hines
2014-04-24
1
-2
/
+2
*
R600/SI: Fix moveToVALU when the first operand is VSrc.
Matt Arsenault
2013-11-18
1
-0
/
+2
*
R600/SI: Add VReg_96 register class to SIRegisterInfo::hasVGPRs()
Tom Stellard
2013-11-15
1
-0
/
+1
*
R600/SI: Add support for private address space load/store
Tom Stellard
2013-11-13
1
-0
/
+8
*
R600/SI: Prefer SALU instructions for bit shift operations
Tom Stellard
2013-11-13
1
-6
/
+42
*
Make method static
Matt Arsenault
2013-11-10
1
-1
/
+1
*
R600/SI: Mark the EXEC register as reserved
Tom Stellard
2013-10-10
1
-0
/
+1
*
R600/SI: Choose the correct MOV instruction for copying immediates
Tom Stellard
2013-08-14
1
-0
/
+11
*
R600/SI: Add more special cases for opcodes to ensureSRegLimit()
Tom Stellard
2013-08-06
1
-0
/
+21
*
Don't cache the instruction and register info from the TargetMachine, because
Bill Wendling
2013-06-07
1
-5
/
+3
*
R600/SI: switch back to RegPressure scheduling
Christian Konig
2013-03-26
1
-0
/
+5
*
Add R600 backend
Tom Stellard
2012-12-11
1
-0
/
+48