external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ...	Craig Topper	2013-07-03	1	-12/+12
*	Remove address spaces from MC.	Rafael Espindola	2013-07-02	2	-6/+0
*	Add a newline.	Chad Rosier	2013-07-01	1	-1/+1
*	R600: Fix an unitialized variable in R600InstrInfo.cpp	Vincent Lejeune	2013-06-30	1	-1/+1
*	R600: Unbreak GCC build.	Benjamin Kramer	2013-06-29	1	-1/+2
*	R600: Support schedule and packetization of trans-only inst	Vincent Lejeune	2013-06-29	7	-90/+246
*	R600: Bank Swizzle now display SCL equivalent	Vincent Lejeune	2013-06-29	3	-12/+12
*	R600/SI: Add processor types for each CIK variant	Tom Stellard	2013-06-28	1	-0/+3
*	R600: Add local memory support via LDS	Tom Stellard	2013-06-28	17	-24/+254
*	R600: Add support for GROUP_BARRIER instruction	Tom Stellard	2013-06-28	7	-3/+64
*	R600: Add ALUInst bit to tablegen definitions v2	Tom Stellard	2013-06-28	4	-4/+8
*	R600: Use new getNamedOperandIdx function generated by TableGen	Tom Stellard	2013-06-25	10	-228/+160
*	R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI	Aaron Watry	2013-06-25	3	-49/+22
*	R600/SI: Expand xor v2i32/v4i32	Aaron Watry	2013-06-25	1	-0/+3
*	R600/SI: Expand urem of v2i32/v4i32 for SI	Aaron Watry	2013-06-25	1	-0/+3
*	R600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG	Aaron Watry	2013-06-25	2	-0/+4
*	R600/SI: Expand ashr of v2i32/v4i32 for SI	Aaron Watry	2013-06-25	1	-0/+2
*	R600/SI: Expand srl of v2i32/v4i32 for SI	Aaron Watry	2013-06-25	1	-0/+2
*	R600/SI: Expand shl of v2i32/v4i32 for SI	Aaron Watry	2013-06-25	1	-0/+3
*	R600/SI: Expand or of v2i32/v4i32 for SI	Aaron Watry	2013-06-25	1	-0/+3
*	R600/SI: Expand mul of v2i32/v4i32 for SI	Aaron Watry	2013-06-25	1	-0/+3
*	R600/SI: Expand and of v2i32/v4i32 for SI	Aaron Watry	2013-06-25	1	-0/+3
*	R600/SI: Report unaligned memory accesses as legal for > 32-bit types	Tom Stellard	2013-06-25	2	-0/+13
*	R600: Add support for i32 loads from the constant address space on Cayman	Tom Stellard	2013-06-25	1	-0/+9
*	R600/SI: Add support for v4i32 and v4f32 kernel args	Tom Stellard	2013-06-25	1	-4/+5
*	R600: Fix typo in R600Schedule.td	Tom Stellard	2013-06-25	1	-2/+2
*	R600: Fix spelling error in comment	Aaron Watry	2013-06-24	1	-1/+1
*	R600/SI: Expand sub for v2i32 and v4i32 for SI	Tom Stellard	2013-06-20	1	-0/+3
*	R600/SI: Expand add for v2i32 and v4i32	Tom Stellard	2013-06-20	1	-0/+2
*	R600: Expand v2i32 load/store instead of custom lowering	Tom Stellard	2013-06-20	1	-2/+2
*	Access the TargetLoweringInfo from the TargetMachine object instead of cachin...	Bill Wendling	2013-06-19	2	-4/+5
*	Move StructurizeCFG out of R600 to generic Transforms.	Matt Arsenault	2013-06-19	3	-898/+1
*	Use GetUnderlyingObject instead of custom function	Matt Arsenault	2013-06-18	1	-58/+20
*	Remove dead prototype.	Bill Wendling	2013-06-18	1	-2/+0
*	R600: PV stores Reg id, not index	Vincent Lejeune	2013-06-17	1	-1/+1
*	R600: Properly set COUNT_3 bit in TEX clause initiating inst for pre EG gen.	Vincent Lejeune	2013-06-17	1	-14/+16
*	R600: Add SI load support for v[24]i32 and store for v2i32	Tom Stellard	2013-06-15	1	-0/+5
*	R600: Use correct encoding for Vertex Fetch instructions on Cayman	Tom Stellard	2013-06-14	3	-156/+294
*	R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman	Tom Stellard	2013-06-14	2	-37/+57
*	R600: Factor the instruction encoding out the RAT_WRITE_CACHELESS_eg class	Tom Stellard	2013-06-14	2	-50/+68
*	R600: Move instruction encoding definitions into a separate .td file	Tom Stellard	2013-06-14	2	-362/+393
*	R600: Don't try to fix reg class when copying IMPLICIT_DEF to a register	Tom Stellard	2013-06-13	1	-1/+2
*	R600: Make helper functions static.	Benjamin Kramer	2013-06-11	1	-4/+5
*	R600: Use a refined heuristic to choose when switching clause	Vincent Lejeune	2013-06-07	2	-10/+47
*	R600: Anti dep better handled in tex clause	Vincent Lejeune	2013-06-07	1	-6/+4
*	R600: Fix calculation of stack offset in AMDGPUFrameLowering	Tom Stellard	2013-06-07	1	-21/+2
*	R600: Rework subtarget info and remove AMDILDevice classes	Tom Stellard	2013-06-07	36	-1458/+218
*	Don't cache the instruction and register info from the TargetMachine, because	Bill Wendling	2013-06-07	21	-63/+75
*	R600: Fix the fetch limits for R600 generation GPUs	Tom Stellard	2013-06-07	4	-27/+30
*	R600: Move Subtarget feature definitions into AMDGPU.td	Tom Stellard	2013-06-07	2	-64/+66