| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| * | Use TableGen to emit information for dwarf register numbers. | Anton Korobeynikov | 2007-11-11 | 1 | -80/+80 |
| * | Fix for PR1540: Specify F0, F1 are sub-registers of D0, etc. | Evan Cheng | 2007-07-13 | 1 | -2/+2 |
| * | Constify some methods. Patch provided by Anton Vayvod, thanks! | Chris Lattner | 2006-08-17 | 1 | -2/+2 |
| * | D'oh - should be even numbered. | Jim Laskey | 2006-03-24 | 1 | -15/+15 |
| * | Add dwarf register numbering to register data. | Jim Laskey | 2006-03-24 | 1 | -31/+80 |
| * | Update to new-style flags usage, simplifying the .td file | Chris Lattner | 2006-02-10 | 1 | -9/+0 |
| * | Rename SPARC V8 target to be the LLVM SPARC target. | Chris Lattner | 2006-02-05 | 1 | -8/+8 |
| * | Reserve G1 for frame offset stuff and use it to handle large stack frames. | Chris Lattner | 2005-12-20 | 1 | -2/+5 |
| * | Elimiante SP and FP, which weren't members of the IntRegs register class | Chris Lattner | 2005-12-19 | 1 | -3/+0 |
| * | Add initial conditional branch support. This doesn't actually work yet due | Chris Lattner | 2005-12-18 | 1 | -0/+8 |
| * | Add patterns for multiply, simplify Y register handling stuff, add RDY instru... | Chris Lattner | 2005-12-17 | 1 | -7/+0 |
| * | Support multiple ValueTypes per RegisterClass, needed for upcoming vector | Nate Begeman | 2005-12-01 | 1 | -3/+3 |
| * | Split RegisterClass 'Methods' into MethodProtos and MethodBodies | Chris Lattner | 2005-08-19 | 1 | -2/+7 |
| * | put reg classes in namespaces | Chris Lattner | 2005-08-19 | 1 | -3/+3 |
| * | Make this file self-contained. | Brian Gaeke | 2004-12-10 | 1 | -1/+62 |
| * | Allocate fewer registers and tighten up alignment restrictions. | Brian Gaeke | 2004-11-18 | 1 | -4/+11 |
| * | SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned! | Misha Brukman | 2004-09-27 | 1 | -1/+1 |
| * | Fix the copy-pasto that Brian noticed: V8 int regs are 32-bits wide, not 64. | Misha Brukman | 2004-09-26 | 1 | -1/+1 |
| * | Use the V8/V9 shared register file description | Misha Brukman | 2004-09-22 | 1 | -77/+8 |
| * | Changes to make this work with Jason's patch. I checked this by hand, but | Chris Lattner | 2004-09-13 | 1 | -48/+50 |
| * | Convert bytes to bits in alignment | Chris Lattner | 2004-08-21 | 1 | -3/+3 |
| * | Make the double-fp pseudo registers be "NamedRegs". | Brian Gaeke | 2004-06-24 | 1 | -5/+8 |
| * | The long integer pseudo-regs are history. So long, we hardly knew ye. | Brian Gaeke | 2004-06-24 | 1 | -30/+0 |
| * | Add pseudo-registers and register class for 64-bit integer values. | Brian Gaeke | 2004-06-22 | 1 | -0/+29 |
| * | Mess around with allocation order. In particular, I think we ought to be | Brian Gaeke | 2004-06-18 | 1 | -3/+3 |
| * | Merge my changes with brians | Chris Lattner | 2004-04-07 | 1 | -6/+5 |
| * | Add support for the "Y" register, used by MUL & DIV. | Brian Gaeke | 2004-04-07 | 1 | -0/+9 |
| * | Avoid allocating special registers a bit more robustly | Chris Lattner | 2004-03-08 | 1 | -3/+11 |
| * | Hack it so we do not try to allocate values to G0. | Brian Gaeke | 2004-03-06 | 1 | -1/+1 |
| * | Double-FP pseudo-registers. | Brian Gaeke | 2004-03-04 | 1 | -3/+36 |
| * | Floating point regs | Brian Gaeke | 2004-03-04 | 1 | -2/+17 |
| * | Implement initial prolog/epilog code insertion methods. | Chris Lattner | 2004-02-29 | 1 | -0/+3 |
| * | Add an instruction selector capable of selecting 'ret void' | Chris Lattner | 2004-02-29 | 1 | -1/+1 |
| * | Tab completion is our friend. | Chris Lattner | 2004-02-28 | 1 | -0/+42 |
