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* Add a MCAsmInfoELF class and factor some code into it.Rafael Espindola2013-10-162-4/+2
* [Sparc] Disable tail call optimization for sparc64.Venkatraman Govindaraju2013-10-091-0/+3
* SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-...NAKAMURA Takumi2013-10-081-1/+0
* Prune trailing linefeeds.NAKAMURA Takumi2013-10-081-2/+0
* [Sparc] Implement JIT for SPARC.Venkatraman Govindaraju2013-10-0812-44/+586
* [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFille...Venkatraman Govindaraju2013-10-082-3/+4
* Remove getEHExceptionRegister and getEHHandlerRegister.Rafael Espindola2013-10-072-11/+0
* [Sparc] Do not emit nop after fcmp* instruction with V9.Venkatraman Govindaraju2013-10-062-7/+22
* [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.Venkatraman Govindaraju2013-10-062-7/+55
* [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx.Venkatraman Govindaraju2013-10-061-4/+4
* [Sparc] Use correct alignment while loading/storing fp128 values.Venkatraman Govindaraju2013-10-051-4/+13
* [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP with...Venkatraman Govindaraju2013-10-051-1/+1
* [Sparc] Correct the floating point conditional code mapping in GetOppositeBra...Venkatraman Govindaraju2013-10-041-8/+8
* [Sparc] Implements exception handling in SPARC with DwarfCFI.Venkatraman Govindaraju2013-09-263-4/+23
* [Sparc] Use correct instruction pattern for CMPri.Venkatraman Govindaraju2013-09-221-1/+1
* [Sparc] Make SPARC instructions' encoding well defined such that TableGen can...Venkatraman Govindaraju2013-09-224-39/+70
* [Sparc] Clean up MOVcc instructions so that TableGen can encode them correctl...Venkatraman Govindaraju2013-09-222-29/+105
* [Sparc] Clean up branch instructions, so that TableGen can encode branch cond...Venkatraman Govindaraju2013-09-223-23/+26
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-221-1/+3
* [Sparc] Add support for TLS in sparc.Venkatraman Govindaraju2013-09-227-10/+238
* [SPARC] Make functions with GLOBAL_OFFSET_TABLE access as non-leaf functions.Venkatraman Govindaraju2013-09-221-0/+4
* [Sparc] Emit .register directive to declare the use of global registers %g2, ...Venkatraman Govindaraju2013-09-221-0/+26
* [Sparc] Fix lowering FABS on fp128 (long double) on pre-v9 targets.Venkatraman Govindaraju2013-09-211-6/+6
* [Sparc] Correctly handle call to functions with ReturnsTwice attribute.Venkatraman Govindaraju2013-09-054-4/+46
* [Sparc] Fix an assertion failure while lowering fcmp on long double.Venkatraman Govindaraju2013-09-041-1/+1
* [Sparc] Add support for soft long double (fp128).Venkatraman Govindaraju2013-09-033-18/+422
* [Sparc] Implement spill and load for long double(f128) registers.Venkatraman Govindaraju2013-09-022-36/+123
* [Sparc] Add long double (f128) instructions to sparc backend. Venkatraman Govindaraju2013-08-255-1/+250
* [Sparc] Added V9's extra floating point registers and their aliases.Venkatraman Govindaraju2013-08-252-1/+58
* Use register masks on SPARC call instructions.Jakob Stoklund Olesen2013-08-232-4/+14
* Add an OtherPreserved field to the CalleeSaved TableGen class.Jakob Stoklund Olesen2013-08-233-2/+13
* [Sparc] Use HWEncoding instead of unused Num field in Sparc register definiti...Venkatraman Govindaraju2013-08-202-12/+9
* [Sparc] Enable xword directive in sparcv9.Venkatraman Govindaraju2013-08-101-3/+6
* Target/*/CMakeLists.txt: Add the dependency to CommonTableGen explicitly for ...NAKAMURA Takumi2013-08-061-1/+1
* [Sparc] Rewrite MBB's live-in registers for leaf functions. Also, addVenkatraman Govindaraju2013-07-302-7/+20
* [Sparc] Use call's debugloc for the unimp instruction.Venkatraman Govindaraju2013-07-301-1/+1
* Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s...Craig Topper2013-07-141-3/+3
* [Sparc]: Add memory operands for the frame references in the storeRegToStackSlotVenkatraman Govindaraju2013-06-261-8/+30
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-222-2/+2
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-191-5/+7
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-163-31/+0
* [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc bac...Venkatraman Govindaraju2013-06-087-162/+61
* Remember the anyext patterns.Jakob Stoklund Olesen2013-06-071-0/+2
* Add missing zextloadi1 to i64 patterns. PR16721.Jakob Stoklund Olesen2013-06-071-0/+3
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-074-9/+10
* Fix a typo in asm string of BP* family of instructions. With this fixRoman Divacky2013-06-071-1/+1
* [Sparc]: Use cmp instruction instead of subcc to compare integers.Venkatraman Govindaraju2013-06-073-17/+19
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-061-4/+4
* Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,Venkatraman Govindaraju2013-06-0419-154/+157
* Sparc: Add support for indirect branch and blockaddress in Sparc backend.Venkatraman Govindaraju2013-06-034-0/+37
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