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* Teach sparc to fold loads/stores into copies.Chris Lattner2006-02-032-37/+47
* Implement isLoadFromStackSlot and isStoreToStackSlotChris Lattner2006-02-032-0/+52
* %fcc is not an alias for %fcc0Chris Lattner2006-02-021-4/+4
* correct an opcodeChris Lattner2006-02-021-2/+2
* Allow the specification of explicit alignments for constant pool entries.Evan Cheng2006-01-311-1/+2
* add a missing break that caused a lot of failures last night :(Chris Lattner2006-01-311-0/+1
* okay, one moreChris Lattner2006-01-311-0/+2
* another noteChris Lattner2006-01-311-1/+2
* More notesChris Lattner2006-01-311-1/+15
* another oneChris Lattner2006-01-311-0/+1
* add a noteChris Lattner2006-01-311-0/+29
* add conditional moves of float and double values on int/fp condition codes.Chris Lattner2006-01-311-6/+27
* treat conditional branches the same way as conditional moves (giving themChris Lattner2006-01-313-129/+17
* compactify all of the integer conditional moves into one instruction that takesChris Lattner2006-01-314-166/+144
* Add immediate forms of integer cmovsChris Lattner2006-01-311-6/+49
* ShrinkifyChris Lattner2006-01-311-143/+86
* Add the full complement of conditional moves of integer registers.Chris Lattner2006-01-311-7/+115
* Compile this:Chris Lattner2006-01-311-21/+37
* I don't see why this optimization isn't safe, but it isn't, so disable itChris Lattner2006-01-311-1/+2
* Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure fr...Chris Lattner2006-01-301-0/+3
* Revamp the ICC/FCC reading instructions to be parameterized in terms of theChris Lattner2006-01-302-71/+212
* Compile:Chris Lattner2006-01-302-16/+27
* If the target has V9 instructions, this pass is a noop, don't botherChris Lattner2006-01-301-8/+16
* When in v9 mode, emit fabsd/fnegd/fmovdChris Lattner2006-01-301-8/+30
* First step towards V9 instructions in the V8 backend, two conditional moveChris Lattner2006-01-303-7/+44
* Two changes:Chris Lattner2006-01-301-0/+11
* When lowering SELECT_CC, see if the input is a lowered SETCC. If so, foldChris Lattner2006-01-301-0/+18
* Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,m...Chris Lattner2006-01-301-6/+4
* Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes,Chris Lattner2006-01-301-0/+26
* Use V8ISD::CALL instead of ISD::CALLChris Lattner2006-01-272-5/+9
* initialize member varsChris Lattner2006-01-271-0/+5
* Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET forNate Begeman2006-01-271-29/+32
* Subtarget feature can now set any variable to any valueEvan Cheng2006-01-271-3/+3
* PHI and INLINEASM are now built-in instructions provided by Target.tdChris Lattner2006-01-272-3/+0
* Rest of subtarget support, remove references to ppcChris Lattner2006-01-264-14/+38
* Add trivial subtarget supportChris Lattner2006-01-266-1/+86
* Set SchedulingForLatency to be the default scheduling preference for all.Evan Cheng2006-01-251-1/+0
* First part of bug 680:Nate Begeman2006-01-251-37/+18
* Default scheduling preference is SchedulingForLatency.Evan Cheng2006-01-251-0/+1
* remove the V8 simple iselChris Lattner2006-01-233-1840/+4
* Add explicit #includes of <iostream>Chris Lattner2006-01-222-0/+2
* Add explicit #includes of <iostream>Chris Lattner2006-01-221-0/+1
* implement support for f32 arguments past the first 6 wordsChris Lattner2006-01-191-0/+5
* Silly Sparc is big endian. If we have to load args out of incoming stack slotsChris Lattner2006-01-161-0/+4
* Make sure that bool,byte and short arguments are the right type when loadedChris Lattner2006-01-151-0/+1
* Disable a broken optimizationChris Lattner2006-01-151-1/+2
* Don't print a label for the first MBB in a function.Chris Lattner2006-01-152-5/+13
* Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksav...Chris Lattner2006-01-151-18/+4
* Implement DYNAMIC_STACKALLOC for V8Chris Lattner2006-01-151-1/+18
* reorder passesChris Lattner2006-01-151-4/+6