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path: root/lib/Target/SparcV9/SparcV9Instr.def
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* M_DUMMY_PHI_FLAG is no longer used to distinguish V9::PHI. Get rid of it andBrian Gaeke2004-08-181-2/+1
* The SparcV9 target no longer uses any pseudoinstructions (SETSW, SETUW,Brian Gaeke2004-08-181-7/+0
* Add M_TERMINATOR_FLAG to terminator instructions (branches and returns).Brian Gaeke2004-07-021-46/+48
* Fix file header comments and include guards -- many files have been moved orBrian Gaeke2004-04-251-1/+1
* fix bug in previous checkinTanya Lattner2004-03-011-1/+1
* Remove a TON of flags that noone cares aboutChris Lattner2004-02-291-362/+362
* Added LLVM copyright header.John Criswell2003-10-211-0/+7
* RDCCR defines arg. #1, not arg. #2.Vikram S. Adve2003-06-201-1/+1
* These instructions really take three operands. This fixes some assertionsChris Lattner2003-06-181-2/+2
* * Changed Bcc instructions to behave like BPcc instructionsMisha Brukman2003-06-061-7/+8
* Added MOVR (move int reg on register condition), aka comparison with zero.Misha Brukman2003-06-021-6/+12
* SparcInstr.def: added 'r' and 'i' versions of MOV(F)cc instructionsMisha Brukman2003-06-021-32/+64
* Made the register and immediate versions of instructions consecutive.Misha Brukman2003-05-301-7/+5
* One of the first major changes to make the work of JITting easier: addingMisha Brukman2003-05-271-55/+113
* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-141-1/+1
* Remove all traces of the "Opcode Mask" field in the MachineInstr classChris Lattner2002-10-281-8/+0
* Fix misspellingChris Lattner2002-10-251-1/+1
* Don't mark JMPLCALL and JMPLRET as branches.Vikram S. Adve2002-10-131-4/+4
* Return address register should be marked as "result" for the JMPL instructionVikram S. Adve2002-09-281-3/+4
* BA has only one argument.Vikram S. Adve2002-07-081-8/+12
* Change latencies for Load, Store and Branch instructions.Vikram S. Adve2002-03-241-40/+42
* Change latency of SETX to improve schedule -- just a hack.Vikram S. Adve2001-11-141-1/+1
* Added M_PSEUDO_FLAG for SETX .. instrRuchira Sasanka2001-11-141-3/+3
* Fixed instruction information for RDCCR and WRCCR.Vikram S. Adve2001-11-041-4/+3
* Added code to support correct saving of %ccr across callsRuchira Sasanka2001-11-031-0/+6
* Add SETX instruction for 64-bit constants.Vikram S. Adve2001-10-281-8/+9
* Added SAVE and RESTORE. Duplicated JMPL into JMPLCALL and JMPLRET,Vikram S. Adve2001-10-221-1/+6
* Change latency of setuw and setsw to 2 cycles.Vikram S. Adve2001-09-301-4/+5
* Seperate instruction definitions into new SparcInstr.def fileChris Lattner2001-09-191-0/+440
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