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path: root/lib/Target/SparcV9/SparcV9_F3.td
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* Great renaming: Sparc --> SparcV9Brian Gaeke2004-02-251-1/+1
* Added LLVM copyright header.John Criswell2003-10-211-0/+5
* Since we now have TableGen editing modes for VIM and (X)Emacs, we no longer needMisha Brukman2003-08-141-2/+2
* Transition to using 'let X = y' instead of 'set X = y'.Chris Lattner2003-08-041-109/+109
* No need for a second immediate field if the class already inherits one.Misha Brukman2003-07-151-2/+1
* Removed unnecessary assignment (it was taken care by a superclass) and clarifiedMisha Brukman2003-07-071-6/+5
* * Force all "don't care" bits to 0 so that there are absolutely no unset bits inMisha Brukman2003-07-021-10/+16
* Added missing directive to store the instruction name.Misha Brukman2003-06-051-0/+1
* Added missing 'rs1' field to F3_rdrs1imm13, 'rd' to F3_rdrs1rs2.Misha Brukman2003-06-051-3/+2
* Added instruction format class 3.15 and floating-point compare instructions.Misha Brukman2003-06-041-2/+16
* Store instructions are different from other Format 3.1/3.2 instructions in thatMisha Brukman2003-06-031-1/+37
* * Removed unused classes: the rd field is always mentioned as the last reg.Misha Brukman2003-06-031-57/+19
* Added MOVR (move int reg on register condition), aka comparison with zero.Misha Brukman2003-06-021-0/+23
* The 'rd' register is consistently mentioned last in instruction definitions.Misha Brukman2003-05-311-4/+16
* The actual order of parameters in a 2-reg-immediate assembly instructions isMisha Brukman2003-05-311-2/+34
* Because the format of the shift instructions is `shift r, shcnt, r', theMisha Brukman2003-05-301-7/+11
* Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well.Brian Gaeke2003-05-301-2/+6
* * Broke up SparcV9.td into separate files as it was getting unmanageableMisha Brukman2003-05-291-0/+171