| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Extensive changes to the way code generation occurs for function | Vikram S. Adve | 2003-05-31 | 6 | -590/+815 |
| * | Reverting previous beautification changes. | Vikram S. Adve | 2003-05-31 | 2 | -384/+408 |
| * | Removed useless code -- the byte order of output code is correct as is. | Misha Brukman | 2003-05-31 | 1 | -6/+1 |
| * | The 'rd' register is consistently mentioned last in instruction definitions. | Misha Brukman | 2003-05-31 | 1 | -4/+16 |
| * | * Put back into action SLL/SRL/SRA{r,i}6 instructions | Misha Brukman | 2003-05-31 | 1 | -8/+8 |
| * | Code beautification, no functional changes. | Misha Brukman | 2003-05-31 | 2 | -408/+384 |
| * | Enabling some of these passes causes lli to break | Misha Brukman | 2003-05-31 | 1 | -0/+6 |
| * | The actual order of parameters in a 2-reg-immediate assembly instructions is | Misha Brukman | 2003-05-31 | 1 | -2/+34 |
| * | When converting virtual registers to immediate constants, change the opcode. | Misha Brukman | 2003-05-30 | 1 | -0/+14 |
| * | Added: | Misha Brukman | 2003-05-30 | 2 | -15/+108 |
| * | Fixed the namespace to match SparcInternals.h; added notes on some missing | Misha Brukman | 2003-05-30 | 1 | -5/+18 |
| * | The register types need to be visible outside of the class to be useful. | Misha Brukman | 2003-05-30 | 1 | -14/+13 |
| * | Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes. | Misha Brukman | 2003-05-30 | 2 | -448/+457 |
| * | Make LLI behave just like LLC with regard to the compile passes it uses. | Misha Brukman | 2003-05-30 | 1 | -0/+15 |
| * | Made the register and immediate versions of instructions consecutive. | Misha Brukman | 2003-05-30 | 1 | -7/+5 |
| * | Because the format of the shift instructions is `shift r, shcnt, r', the | Misha Brukman | 2003-05-30 | 1 | -7/+11 |
| * | Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well. | Brian Gaeke | 2003-05-30 | 2 | -3/+7 |
| * | so far everything compiles | Guochun Shi | 2003-05-30 | 2 | -23/+39 |
| * | Since there is now another derived .inc file, ignore them all. | Misha Brukman | 2003-05-29 | 1 | -1/+1 |
| * | Use an absolute path to TableGen because not everyone (e.g. automatic tester) | Misha Brukman | 2003-05-29 | 1 | -1/+1 |
| * | When TableGen finds an error in the SparcV9.td file, it exits with a non-zero | Misha Brukman | 2003-05-29 | 1 | -1/+4 |
| * | Fixed to use the correct format of the instruction. | Misha Brukman | 2003-05-29 | 1 | -3/+3 |
| * | This should work better with re-generating the SparcV9CodeEmitter.inc file. | Misha Brukman | 2003-05-29 | 1 | -6/+8 |
| * | * Broke up SparcV9.td into separate files as it was getting unmanageable | Misha Brukman | 2003-05-29 | 5 | -258/+381 |
| * | Fixed ordering of elements in instructions: although the binary instructions | Misha Brukman | 2003-05-28 | 1 | -30/+50 |
| * | Add dependency to make TableGen rule fire. | Brian Gaeke | 2003-05-28 | 1 | -0/+2 |
| * | Fixed an error preventing compilation. | Misha Brukman | 2003-05-27 | 2 | -2/+2 |
| * | Added the 'r' and 'i' annotations to instructions as their opcode names have | Misha Brukman | 2003-05-27 | 1 | -3/+3 |
| * | Keep track of the current BasicBlock being processed so that a referencing | Misha Brukman | 2003-05-27 | 2 | -2/+4 |
| * | Added 'r' and 'i' annotations to instructions as SparcInstr.def has changed. | Misha Brukman | 2003-05-27 | 1 | -19/+22 |
| * | Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed. | Misha Brukman | 2003-05-27 | 1 | -16/+16 |
| * | Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed. | Misha Brukman | 2003-05-27 | 1 | -41/+79 |
| * | Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed. | Misha Brukman | 2003-05-27 | 3 | -27/+30 |
| * | Added entries for each of the instructions with annotations ('r' or 'i'). | Misha Brukman | 2003-05-27 | 1 | -34/+57 |
| * | One of the first major changes to make the work of JITting easier: adding | Misha Brukman | 2003-05-27 | 1 | -55/+113 |
| * | * Allow passing in an unsigned configuration to allocateSparcTargetMachine() | Misha Brukman | 2003-05-27 | 1 | -10/+35 |
| * | Moved generation of the SparcV9CodeEmitter.inc file higher in the Makefile so | Misha Brukman | 2003-05-27 | 1 | -3/+4 |
| * | Add prototypes to add passes to JIT compilation and code emission. | Misha Brukman | 2003-05-27 | 1 | -8/+17 |
| * | Broke out class definition from SparcV9CodeEmitter, and added ability to take a | Misha Brukman | 2003-05-27 | 2 | -25/+35 |
| * | SparcV9CodeEmitter.cpp is a part of the Sparc code emitter. The main function | Misha Brukman | 2003-05-27 | 3 | -0/+94 |
| * | Added definitions for a bunch of floating-point instructions. | Misha Brukman | 2003-05-27 | 1 | -65/+381 |
| * | Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() | Vikram S. Adve | 2003-05-27 | 2 | -10/+11 |
| * | (1) Added special register class containing (for now) %fsr. | Vikram S. Adve | 2003-05-27 | 3 | -29/+29 |
| * | Added special register class containing (for now) %fsr. | Vikram S. Adve | 2003-05-27 | 5 | -158/+111 |
| * | Bug fix: right shift for int divide-by-power-of-2 was incorrect for | Vikram S. Adve | 2003-05-25 | 1 | -11/+48 |
| * | Bug fix: padding bytes within a structure should go after each field! | Vikram S. Adve | 2003-05-25 | 1 | -5/+5 |
| * | Bug fix: sign-extension was not happening for C = -MININT since C == -C! | Vikram S. Adve | 2003-05-25 | 1 | -2/+3 |
| * | Add support for compiling varargs functions. | Vikram S. Adve | 2003-05-25 | 4 | -77/+179 |
| * | Reword to remove reference to how things worked in the past. | Misha Brukman | 2003-05-24 | 1 | -4/+3 |
| * | Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface. | Misha Brukman | 2003-05-24 | 1 | -0/+29 |
