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path: root/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
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* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-251-2/+2
* [SystemZ] Add back endUlrich Weigand2013-05-061-0/+616
* Remove the SystemZ backend.Dan Gohman2011-10-241-779/+0
* fix a long standing wart: all the ComplexPattern's were beingChris Lattner2010-09-211-15/+14
* zap dead code.Chris Lattner2010-09-041-2/+0
* Merge the SystemZ subreg_even32 SubRegIndex into subreg_32bit. The SubRegIndicesJakob Stoklund Olesen2010-05-281-2/+2
* Use enums instead of literals for SystemZ subregistersJakob Stoklund Olesen2010-05-251-11/+11
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-171-3/+2
* Sink InstructionSelect() out of each target into SDISel, and rename itChris Lattner2010-03-021-49/+7
* Split SelectionDAGISel::IsLegalAndProfitableToFold toEvan Cheng2010-02-151-2/+1
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-8/+8
* Change SelectCode's argument from SDValue to SDNode *, to make it moreDan Gohman2010-01-051-32/+31
* Fix invalid chain folding for memory variant of sdiv / udivAnton Korobeynikov2010-01-041-26/+26
* Remove uninteresting and confusing debug output.Dan Gohman2009-11-051-2/+0
* Rename getTargetNode to getMachineNode, for consistency with theDan Gohman2009-09-251-37/+38
* Fix some refactos for iostream changes (in -Asserts mode).Daniel Dunbar2009-08-231-4/+4
* eliminate uses of cerr()Chris Lattner2009-08-231-9/+11
* eliminate the last DOUTs from the targets.Chris Lattner2009-08-231-49/+32
* Split EVT into MVT and EVT, the former representing _just_ a primitive type, ...Owen Anderson2009-08-111-21/+21
* Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ...Owen Anderson2009-08-101-27/+27
* Fix 'may be used uninitialized' warning.Daniel Dunbar2009-07-171-2/+2
* UnbreakAnton Korobeynikov2009-07-161-0/+1
* Fix logic inversion for RI-mode address selectionAnton Korobeynikov2009-07-161-1/+1
* Unbreak mvi and friends - emit only 'significant' part of the operandAnton Korobeynikov2009-07-161-0/+6
* Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide...Anton Korobeynikov2009-07-161-25/+24
* Use divide single for 32 bit signed dividesAnton Korobeynikov2009-07-161-10/+24
* Remove redundand register moveAnton Korobeynikov2009-07-161-21/+7
* Properly handle divides. As a bonus - implement memory versions of them.Anton Korobeynikov2009-07-161-0/+206
* 32 bit shifts have only 12 bit displacementsAnton Korobeynikov2009-07-161-3/+13
* TyposAnton Korobeynikov2009-07-161-2/+2
* Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.Anton Korobeynikov2009-07-161-160/+120
* Add support for 12 bit displacementsAnton Korobeynikov2009-07-161-44/+108
* 32-bit ri addressing mode has only 12-bit displacementAnton Korobeynikov2009-07-161-0/+84
* Swap the order of imm and idx field for rri addrmode in order to make handlin...Anton Korobeynikov2009-07-161-6/+6
* Do not truncate sign bits for negative immsAnton Korobeynikov2009-07-161-18/+20
* Add address computation stuffAnton Korobeynikov2009-07-161-3/+63
* Add stores and truncstoresAnton Korobeynikov2009-07-161-3/+4
* Add patterns for various extloadsAnton Korobeynikov2009-07-161-0/+3
* Do some heroic rri address matching (shamelessly stolen from x86 backend). No...Anton Korobeynikov2009-07-161-11/+230
* Add shifts and reg-imm address matchingAnton Korobeynikov2009-07-161-0/+87
* Add bunch of reg-imm movsAnton Korobeynikov2009-07-161-0/+6
* Provide masked reg-imm 'or' and 'and'Anton Korobeynikov2009-07-161-1/+7
* Let's start another backend :)Anton Korobeynikov2009-07-161-0/+129
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