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path: root/lib/Target/SystemZ/SystemZInstrInfo.h
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* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-0/+1
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-1/+0
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-0/+1
* [SystemZ] Add immediate addition involving high wordsRichard Sandiford2013-10-011-0/+2
* [SystemZ] Add patterns to load a constant into a high word (IIHF)Richard Sandiford2013-10-011-0/+2
* [SystemZ] Add register zero extensions involving at least one high wordRichard Sandiford2013-10-011-0/+2
* [SystemZ] Use upper words of GR64s for codegenRichard Sandiford2013-10-011-1/+6
* [SystemZ] Add unsigned compare-and-branch instructionsRichard Sandiford2013-09-181-0/+8
* [SystemZ] Use CLC and IPM to implement memcmpRichard Sandiford2013-08-121-0/+6
* [SystemZ] Optimize floating-point comparisons with zeroRichard Sandiford2013-08-071-14/+17
* [SystemZ] Use BRCT and BRCTG to eliminate add-&-compare sequencesRichard Sandiford2013-08-051-1/+9
* [SystemZ] Use LOAD AND TEST to eliminate comparisons against zeroRichard Sandiford2013-08-051-0/+4
* [SystemZ] Reuse CC results for integer comparisons with zeroRichard Sandiford2013-08-011-7/+17
* [SystemZ] Be more careful about inverting CC masksRichard Sandiford2013-07-311-2/+6
* [SystemZ] Move compare-and-branch generation even laterRichard Sandiford2013-07-311-8/+0
* [SystemZ] Postpone NI->RISBG conversion to convertToThreeAddress()Richard Sandiford2013-07-311-0/+6
* [SystemZ] Rework compare and branch supportRichard Sandiford2013-07-251-0/+8
* [SystemZ] Add LOCR and LOCGRRichard Sandiford2013-07-251-0/+17
* [SystemZ] Use SLLK, SRLK and SRAK for codegenRichard Sandiford2013-07-191-0/+5
* [SystemZ] Remove no-op MVCsRichard Sandiford2013-07-051-0/+2
* [SystemZ] Fold more spillsRichard Sandiford2013-07-031-1/+7
* [SystemZ] Use MVC to spill loads and storesRichard Sandiford2013-07-021-0/+8
* [SystemZ] Immediate compare-and-branch supportRichard Sandiford2013-05-291-1/+3
* [SystemZ] Register compare-and-branch supportRichard Sandiford2013-05-281-2/+22
* [SystemZ] Tweak SystemZInstrInfo::isBranch() interfaceRichard Sandiford2013-05-281-2/+12
* [SystemZ] Add long branch passRichard Sandiford2013-05-201-0/+3
* [SystemZ] Add back endUlrich Weigand2013-05-061-0/+123
* Remove the SystemZ backend.Dan Gohman2011-10-241-113/+0
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-011-1/+4
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-3/+3
* Move callee-saved regs spills / reloads to TFIAnton Korobeynikov2010-11-271-10/+0
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-161-3/+0
* Replace copyRegToReg with copyPhysReg for SystemZ.Jakob Stoklund Olesen2010-07-111-5/+4
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-171-1/+2
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-221-2/+4
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-1/+2
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-2/+4
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-051-1/+0
* Replace TargetInstrInfo::isInvariantLoad and its target-specificDan Gohman2009-10-071-1/+0
* Handle long-disp stuff more consistentlyAnton Korobeynikov2009-07-161-0/+7
* Another predicate routineAnton Korobeynikov2009-07-161-0/+1
* More helpersAnton Korobeynikov2009-07-161-0/+2
* Add bunch of branch folding stuffAnton Korobeynikov2009-07-161-0/+11
* Implement 'large' PIC modelAnton Korobeynikov2009-07-161-0/+24
* Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements ar...Anton Korobeynikov2009-07-161-0/+1
* SELECT_CC loweringAnton Korobeynikov2009-07-161-0/+2
* Provide proper stack offsets for outgoing argumentsAnton Korobeynikov2009-07-161-1/+1
* Emit callee-saved regs spills / restoresAnton Korobeynikov2009-07-161-1/+3
* Let's start another backend :)Anton Korobeynikov2009-07-161-0/+70
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