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path: root/lib/Target/SystemZ/SystemZInstrInfo.td
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* Flag -> Glue, the ongoing sagaChris Lattner2010-12-231-4/+4
* Remove isTwoAddress from SystemZ.Eric Christopher2010-06-211-6/+7
* Merge the SystemZ subreg_even32 SubRegIndex into subreg_32bit. The SubRegIndicesJakob Stoklund Olesen2010-05-281-2/+2
* Improve systemz to model cmp and ucmp nodes as returningChris Lattner2010-03-281-37/+27
* set SDNPVariadic on nodes throughout the rest of the targets thatChris Lattner2010-03-191-1/+1
* fix a type compatibility bug. imm is i32 in the input Chris Lattner2010-03-081-1/+2
* The mayHaveSideEffects flag is no longer used.Dan Gohman2010-02-271-1/+1
* Rename usesCustomDAGSchedInserter to usesCustomInserter, and update aDan Gohman2009-10-291-1/+1
* Update SystemZ to use PSW following the way x86 uses EFLAGS. BesidesDan Gohman2009-10-281-25/+25
* Some dummy cost model for s390x:Anton Korobeynikov2009-08-221-0/+4
* Typo :(Anton Korobeynikov2009-08-211-2/+2
* Correct instruction names for subtract-with-borrowAnton Korobeynikov2009-08-211-2/+2
* Convert bswap test to filecheck, add more test entries & convert stuff to fil...Anton Korobeynikov2009-08-051-1/+1
* Add memory versions of some instructions.Anton Korobeynikov2009-08-051-6/+83
* Add carry producing / using versions of add / subAnton Korobeynikov2009-07-181-6/+63
* Provide expansion for ct* intrinsicsAnton Korobeynikov2009-07-181-0/+12
* Temporary disable 16 bit bswapAnton Korobeynikov2009-07-161-3/+4
* Add instruction formats and few opcodesAnton Korobeynikov2009-07-161-490/+619
* Add bswap patternsAnton Korobeynikov2009-07-161-0/+18
* Provide crazy pseudos for regpairs spills / reloadsAnton Korobeynikov2009-07-161-1/+30
* Revert the commit, it just hides the real bugAnton Korobeynikov2009-07-161-1/+2
* Out GR128 regclass is not a 'real' i128 one.Anton Korobeynikov2009-07-161-3/+3
* Handle bitconvertsAnton Korobeynikov2009-07-161-4/+5
* Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension ...Anton Korobeynikov2009-07-161-2/+1
* Handle FP callee-saved regsAnton Korobeynikov2009-07-161-1/+2
* Implement all comparisonsAnton Korobeynikov2009-07-161-7/+30
* Add constpool lowering / printingAnton Korobeynikov2009-07-161-1/+2
* Fix fallout from prev. patchAnton Korobeynikov2009-07-161-4/+4
* Use divide single for 32 bit signed dividesAnton Korobeynikov2009-07-161-4/+4
* Implement 'large' PIC modelAnton Korobeynikov2009-07-161-1/+1
* Implement shifts properly (hopefilly - finally!)Anton Korobeynikov2009-07-161-17/+5
* Remove redundand register moveAnton Korobeynikov2009-07-161-0/+8
* Properly handle divides. As a bonus - implement memory versions of them.Anton Korobeynikov2009-07-161-60/+26
* Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stu...Anton Korobeynikov2009-07-161-2/+1
* 32 bit rotate is not twoaddr instructionAnton Korobeynikov2009-07-161-2/+1
* 32 bit shifts have only 12 bit displacementsAnton Korobeynikov2009-07-161-1/+1
* Unbreak indirect branchesAnton Korobeynikov2009-07-161-1/+1
* All calls clobbers R14Anton Korobeynikov2009-07-161-3/+3
* Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.Anton Korobeynikov2009-07-161-8/+10
* Add support for 12 bit displacementsAnton Korobeynikov2009-07-161-62/+101
* Add jump tablesAnton Korobeynikov2009-07-161-11/+10
* Exapnd br_jt into indirect branch. Provide pattern for indirect branches.Anton Korobeynikov2009-07-161-0/+6
* Implement 64 bit immediatesAnton Korobeynikov2009-07-161-0/+4
* Add rotatesAnton Korobeynikov2009-07-161-1/+11
* Add patterns for integer negateAnton Korobeynikov2009-07-161-0/+15
* Provide proper patterns for and with imm instructions. Tune the tests accordi...Anton Korobeynikov2009-07-161-241/+15
* Add 32 bit and reg-imm and disable invalid patterns for nowAnton Korobeynikov2009-07-161-2/+27
* Add z9 and z10 target processors. Mark z10-only instructions as such.Anton Korobeynikov2009-07-161-9/+20
* Fix MUL64rm instruction asmprintingAnton Korobeynikov2009-07-161-1/+1
* Preliminary asmprinting of globalsAnton Korobeynikov2009-07-161-0/+1
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