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path: root/lib/Target/SystemZ/SystemZSubtarget.cpp
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* [SystemZ] Add FI[EDX]BRARichard Sandiford2013-08-211-1/+2
* [SystemZ] Add RISBLG and RISBHG instruction definitionsRichard Sandiford2013-07-311-1/+1
* [SystemZ] Add STOC and STOCGRichard Sandiford2013-07-251-1/+1
* [SystemZ] Start adding z196 and zEC12 supportRichard Sandiford2013-07-191-1/+3
* [SystemZ] Add back endUlrich Weigand2013-05-061-0/+56
* Remove the SystemZ backend.Dan Gohman2011-10-241-54/+0
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-14/+0
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-1/+1
* Change createAsmParser to take a MCSubtargetInfo instead of triple,Evan Cheng2011-07-091-0/+13
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-1/+2
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-071-2/+2
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-011-1/+1
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-011-1/+1
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-011-2/+6
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-2/+5
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-1/+1
* Implement 'large' PIC modelAnton Korobeynikov2009-07-161-0/+19
* Add z9 and z10 target processors. Mark z10-only instructions as such.Anton Korobeynikov2009-07-161-2/+3
* Let's start another backend :)Anton Korobeynikov2009-07-161-0/+27
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