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path: root/lib/Target/TargetSelectionDAG.td
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* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-161-4/+4
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-161-4/+4
* Split the ATOMIC NodeType's to include the size, e.g.Dale Johannesen2008-08-281-184/+84
* Implement 32 & 64 bit versions of PPC atomicDale Johannesen2008-08-251-0/+105
* Add libm-oriented ISD opcodes for rounding operations.Dan Gohman2008-08-211-0/+5
* Clean up a dead return missed in r55055.Dan Gohman2008-08-201-3/+2
* Tablegen generated code already tests the opcode value, so it's notDan Gohman2008-08-201-204/+148
* Revert r55018 and apply the correct "fix" for the 64-bit sub_and_fetch atomic.Bill Wendling2008-08-201-28/+3
* Add support for the __sync_sub_and_fetch atomics and friends for X86. The codeBill Wendling2008-08-191-3/+28
* Since build_vector is a variadic node, the numberDuncan Sands2008-07-281-1/+1
* Remove the OrigVT member from AtomicSDNode, as it is redundant withDan Gohman2008-06-251-12/+12
* Added MemOperands to Atomic operations since Atomics touches memory.Mon P Wang2008-06-251-35/+36
* add missing atomic intrinsic from gccAndrew Lenharth2008-06-141-0/+2
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-4/+4
* Teach the DAGISelEmitter to not compute the variable_ops operandDan Gohman2008-05-311-2/+1
* Fix a tblgen problem handling variable_ops in tblgen instructionDan Gohman2008-05-291-0/+1
* Add support for vicmp/vfcmp codegen, more legalize support coming.Nate Begeman2008-05-121-0/+1
* Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang2008-05-051-0/+16
* Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs...Christopher Lamb2008-03-161-8/+0
* Get rid of a pseudo instruction and replace it with subreg based operation on...Christopher Lamb2008-03-131-1/+6
* Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ...Evan Cheng2008-03-081-7/+16
* Atomic op support. If any gcc test uses __sync builtins, it might start fail...Andrew Lenharth2008-02-211-0/+91
* llvm.memory.barrier, and impl for x86 and alphaAndrew Lenharth2008-02-161-0/+7
* Change how FP immediates are handled. Nate Begeman2008-02-141-2/+1
* Enable SSE4 codegen and pattern matching.Nate Begeman2008-02-111-2/+2
* Tablegen support for insert & extract element matchingNate Begeman2008-02-091-0/+16
* Allow ComplexExpressions in InstrInfo.td files to be slightly more... complex...Christopher Lamb2008-01-311-1/+9
* Factor the addressing mode and the load/store VT out of LoadSDNodeDan Gohman2008-01-301-29/+29
* This commit changes:Chris Lattner2008-01-171-7/+0
* rename SDTRet -> SDTNone.Chris Lattner2008-01-151-2/+4
* add SDNPSideEffect node property declarationChris Lattner2008-01-101-0/+1
* add SDNPMayLoad to the 'load' sdnode definition. This is enough to get all t...Chris Lattner2008-01-101-1/+3
* rename isStore -> mayStore to more accurately reflect what it captures.Chris Lattner2008-01-061-1/+1
* Change the 'isStore' inferrer to look for 'SDNPMayStore' Chris Lattner2008-01-061-2/+5
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
* add a immAllZerosV_bc pattern fragment for consistency with others.Chris Lattner2007-11-241-3/+6
* Unifacalize the CALLSEQ{START,END} stuff.Bill Wendling2007-11-131-0/+5
* Rename keyword "modify" -> "implicit".Evan Cheng2007-09-251-1/+1
* Initial support for multi-result patterns:Evan Cheng2007-09-121-0/+2
* Long double patch 4 of N: initial x87 implementation.Dale Johannesen2007-08-051-0/+14
* Add selection DAG nodes for subreg insert/extract. PR1350Christopher Lamb2007-07-261-0/+5
* Fix comments about vectors to use the current wording.Dan Gohman2007-07-161-1/+1
* Implement "general dynamic", "initial exec" and "local exec" TLS models forLauro Ramos Venancio2007-04-201-0/+4
* Make LABEL a builtin opcode.Jim Laskey2007-01-261-3/+0
* Fix predicates for unindexed stores so they don't accidentally match indexedChris Lattner2006-11-141-33/+39
* Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng2006-11-091-12/+12
* Added indexed store node and patfrag's.Evan Cheng2006-11-081-11/+131
* Change load PatFrag to ignore indexed load.Evan Cheng2006-10-261-31/+62
* Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.Evan Cheng2006-10-131-12/+40
* Add properties to ComplexPattern.Evan Cheng2006-10-111-1/+3