| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Initial va_arg support for x86-64. Patch by David Meyer! | Dan Gohman | 2010-10-12 | 1 | -1/+10 |
| * | Massive rewrite of MMX: | Dale Johannesen | 2010-09-30 | 1 | -3/+7 |
| * | reimplement elf TLS support in terms of addressing modes, eliminating Segment... | Chris Lattner | 2010-09-22 | 1 | -3/+0 |
| * | convert the last 4 X86ISD nodes that should have memoperands to have them. | Chris Lattner | 2010-09-22 | 1 | -21/+21 |
| * | give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only | Chris Lattner | 2010-09-22 | 1 | -3/+2 |
| * | give FP_TO_INT16_IN_MEM and friends a memoperand. They are only | Chris Lattner | 2010-09-22 | 1 | -11/+12 |
| * | give VZEXT_LOAD a memory operand, it now works with segment registers. | Chris Lattner | 2010-09-22 | 1 | -4/+4 |
| * | give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256... | Chris Lattner | 2010-09-21 | 1 | -5/+5 |
| * | Reimplement r114460 in target-independent DAGCombine rather than target-depen... | Owen Anderson | 2010-09-21 | 1 | -0/+5 |
| * | Added skeleton for inline asm multiple alternative constraint support. | John Thompson | 2010-09-13 | 1 | -0/+6 |
| * | Use movlps, movlpd, movss and movsd specific nodes instead of pattern matchin... | Bruno Cardoso Lopes | 2010-09-01 | 1 | -0/+2 |
| * | Use MOVLHPS and MOVHLPS x86 nodes whenever possible. Also remove some useless... | Bruno Cardoso Lopes | 2010-08-31 | 1 | -5/+1 |
| * | Prepare LowerVECTOR_SHUFFLEv8i16 to use x86 target specific nodes directly | Bruno Cardoso Lopes | 2010-08-21 | 1 | -0/+3 |
| * | This is the first step towards refactoring the x86 vector shuffle code. The | Bruno Cardoso Lopes | 2010-08-20 | 1 | -0/+37 |
| * | Add AVX matching patterns to Packed Bit Test intrinsics. | Bruno Cardoso Lopes | 2010-08-10 | 1 | -0/+3 |
| * | ~40% faster vector shl <4 x i32> on SSE 4.1 Larger improvements for smaller ... | Nate Begeman | 2010-07-27 | 1 | -0/+1 |
| * | On x86, f32 / f64 nodes share the same registers as 128-bit vector values. | Evan Cheng | 2010-07-26 | 1 | -0/+4 |
| * | Add an ILP scheduler. This is a register pressure aware scheduler that's | Evan Cheng | 2010-07-24 | 1 | -0/+3 |
| * | Custom lower the memory barrier instructions and add support | Eric Christopher | 2010-07-22 | 1 | -1/+8 |
| * | Pulling out previous patch, must've run the tests in | Eric Christopher | 2010-07-21 | 1 | -5/+1 |
| * | Lower MEMBARRIER on x86 and support processors without SSE2. | Eric Christopher | 2010-07-21 | 1 | -1/+5 |
| * | Use TargetOpcode::COPY instead of X86-native register copy instructions when | Jakob Stoklund Olesen | 2010-07-14 | 1 | -1/+0 |
| * | Reapply bottom-up fast-isel, with several fixes for x86-32: | Dan Gohman | 2010-07-10 | 1 | -2/+1 |
| * | --- Reverse-merging r107947 into '.': | Bob Wilson | 2010-07-09 | 1 | -1/+2 |
| * | Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting | Dan Gohman | 2010-07-09 | 1 | -2/+1 |
| * | Revert 107840 107839 107813 107804 107800 107797 107791. | Dan Gohman | 2010-07-08 | 1 | -1/+2 |
| * | Add X86FastISel support for return statements. This entails refactoring | Dan Gohman | 2010-07-07 | 1 | -2/+1 |
| * | Simplify FastISel's constructor by giving it a FunctionLoweringInfo | Dan Gohman | 2010-07-07 | 1 | -19/+2 |
| * | Split the SDValue out of OutputArg so that SelectionDAG-independent | Dan Gohman | 2010-07-07 | 1 | -0/+3 |
| * | CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext. | Dan Gohman | 2010-07-06 | 1 | -1/+1 |
| * | Fix up -fstack-protector on linux to use the segment | Eric Christopher | 2010-07-06 | 1 | -0/+6 |
| * | The hasMemory argument is irrelevant to how the argument | Dale Johannesen | 2010-06-25 | 1 | -1/+0 |
| * | Add first pass at darwin tls compiler support. | Eric Christopher | 2010-06-03 | 1 | -0/+7 |
| * | Fix i64->f64 conversion, x86-64, -no-sse. A bit | Dale Johannesen | 2010-05-21 | 1 | -0/+1 |
| * | Implement a bunch more TargetSelectionDAGInfo infrastructure. | Dan Gohman | 2010-05-11 | 1 | -17/+0 |
| * | Remove the TargetLowering::getSubtarget() virtual function, which | Dan Gohman | 2010-05-11 | 1 | -1/+1 |
| * | Get rid of the EdgeMapping map. Instead, just check for BasicBlock | Dan Gohman | 2010-05-01 | 1 | -7/+5 |
| * | Promoting 16-bit cmp / test aren't free. Don't do it. | Evan Cheng | 2010-04-26 | 1 | -3/+2 |
| * | - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo an... | Evan Cheng | 2010-04-26 | 1 | -5/+0 |
| * | Stop abusing EmitInstrWithCustomInserter for target-dependent | Dale Johannesen | 2010-04-25 | 1 | -0/+5 |
| * | Fix X86ISD::CMP i16 to i32 promotion. | Evan Cheng | 2010-04-23 | 1 | -2/+3 |
| * | Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel | Dan Gohman | 2010-04-22 | 1 | -2/+4 |
| * | isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted. | Evan Cheng | 2010-04-21 | 1 | -0/+2 |
| * | Use const qualifiers with TargetLowering. This eliminates several | Dan Gohman | 2010-04-17 | 1 | -72/+76 |
| * | Move per-function state out of TargetLowering subclasses and into | Dan Gohman | 2010-04-17 | 1 | -11/+0 |
| * | More work to allow dag combiner to promote 16-bit ops to 32-bit. | Evan Cheng | 2010-04-17 | 1 | -1/+11 |
| * | Eliminate an unnecessary SelectionDAG dependency in getOptimalMemOpType. | Dan Gohman | 2010-04-16 | 1 | -3/+3 |
| * | Adding support for dag combiner to promote operations for profit. This requir... | Evan Cheng | 2010-04-16 | 1 | -0/+2 |
| * | Add const qualifiers to CodeGen's use of LLVM IR constructs. | Dan Gohman | 2010-04-15 | 1 | -1/+1 |
| * | Factor out EH landing pad code into a separate function, and constify | Dan Gohman | 2010-04-14 | 1 | -2/+2 |
