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path: root/lib/Target/X86/X86ISelLowering.h
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* - Use a different wrapper node for RIP-relative GV, etc.Evan Cheng2006-11-301-0/+4
* Don't dag combine floating point select to max and min intrinsics. ThoseEvan Cheng2006-11-101-1/+5
* Fixed a bug which causes x86 be to incorrectly matchEvan Cheng2006-11-071-0/+5
* allow the address of a global to be used with the "i" constraint when inChris Lattner2006-10-311-1/+6
* Fixed a significant bug where unpcklpd is incorrectly used to extract element...Evan Cheng2006-10-271-0/+4
* Implement branch analysis/xform hooks required by the branch folding pass.Chris Lattner2006-10-201-22/+0
* fit in 80 colsChris Lattner2006-10-181-12/+12
* update commentsChris Lattner2006-09-281-1/+1
* Adding codegeneration for StdCall & FastCall calling conventionsAnton Korobeynikov2006-09-201-1/+9
* X86ISD::CMP now produces a chain as well as a flag. Make that the chainEvan Cheng2006-09-111-1/+1
* Committing X86-64 support.Evan Cheng2006-09-081-0/+10
* Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll.Chris Lattner2006-07-311-0/+8
* Implement the inline asm 'A' constraint. This implements PR825 andChris Lattner2006-07-111-0/+2
* X86 target specific DAG combine: turn build_vector (load x), (load x+4),Evan Cheng2006-07-071-0/+6
* Simplify X86CompilationCallback: always align to 16-byte boundary; don't save...Evan Cheng2006-06-241-0/+16
* Switch X86 over to a call-selection model where the lowering code createsEvan Cheng2006-05-251-16/+4
* Patches to make the LLVM sources more -pedantic clean. Patch providedChris Lattner2006-05-241-1/+1
* Remove PreprocessCCCArguments and PreprocessFastCCArguments now thatEvan Cheng2006-05-231-34/+2
* Implement an annoying part of the Darwin/X86 abi: the callee of a structChris Lattner2006-05-231-1/+1
* Should pass by reference.Evan Cheng2006-05-171-2/+2
* - Clean up formal argument lowering code. Prepare for vector pass by value work.Evan Cheng2006-04-271-2/+23
* Switching over FORMAL_ARGUMENTS mechanism to lower call arguments.Evan Cheng2006-04-261-2/+10
* Separate LowerOperation() into multiple functions, one per opcode.Evan Cheng2006-04-251-6/+30
* Now generating perfect (I think) code for "vector set" with a single non-zeroEvan Cheng2006-04-211-7/+4
* - Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1>Evan Cheng2006-04-201-2/+10
* Commute vector_shuffle to match more movlhps, movlp{s|d} cases.Evan Cheng2006-04-191-5/+2
* Last few SSE3 intrinsics.Evan Cheng2006-04-141-0/+8
* Added support for _mm_move_ss and _mm_move_sd.Evan Cheng2006-04-111-0/+4
* - movlp{s|d} and movhp{s|d} support.Evan Cheng2006-04-061-0/+8
* Support for comi / ucomi intrinsics.Evan Cheng2006-04-051-1/+1
* Handle canonical form of e.g.Evan Cheng2006-04-051-0/+5
* Use a X86 target specific node X86ISD::PINSRW instead of a mal-formedEvan Cheng2006-03-311-1/+5
* Add support to use pextrw and pinsrw to extract and insert a word elementEvan Cheng2006-03-311-0/+4
* - Added some SSE2 128-bit packed integer ops.Evan Cheng2006-03-291-0/+18
* * Prefer using operation of matching types. e.g unpcklpd rather than movlhps.Evan Cheng2006-03-281-0/+4
* - Clean up / consoladate various shuffle masks.Evan Cheng2006-03-281-9/+4
* Model unpack lower and interleave as vector_shuffle so we can lower theEvan Cheng2006-03-281-4/+4
* Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes /...Evan Cheng2006-03-261-4/+0
* Build arbitrary vector with more than 2 distinct scalar elements with aEvan Cheng2006-03-251-0/+4
* Support for scalar to vector with zero extension.Evan Cheng2006-03-241-6/+8
* Handle BUILD_VECTOR with all zero elements.Evan Cheng2006-03-241-0/+3
* More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd.Evan Cheng2006-03-241-0/+13
* Handle more shuffle cases with SHUFP* instructions.Evan Cheng2006-03-241-4/+4
* Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not doEvan Cheng2006-03-221-1/+1
* - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only supportEvan Cheng2006-03-221-0/+9
* - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matchesEvan Cheng2006-03-221-7/+8
* Some splat and shuffle support.Evan Cheng2006-03-221-0/+18
* - Use movaps to store 128-bit vector integers.Evan Cheng2006-03-211-0/+4
* Added getTargetLowering() to TargetMachine. Refactored targets to support this.Evan Cheng2006-03-131-0/+6
* - Clean up the lowering and selection code of ConstantPool, GlobalAddress,Evan Cheng2006-02-231-3/+3