| Commit message (Expand) | Author | Age | Files | Lines |
* | - Use a different wrapper node for RIP-relative GV, etc. | Evan Cheng | 2006-11-30 | 1 | -0/+4 |
* | Don't dag combine floating point select to max and min intrinsics. Those | Evan Cheng | 2006-11-10 | 1 | -1/+5 |
* | Fixed a bug which causes x86 be to incorrectly match | Evan Cheng | 2006-11-07 | 1 | -0/+5 |
* | allow the address of a global to be used with the "i" constraint when in | Chris Lattner | 2006-10-31 | 1 | -1/+6 |
* | Fixed a significant bug where unpcklpd is incorrectly used to extract element... | Evan Cheng | 2006-10-27 | 1 | -0/+4 |
* | Implement branch analysis/xform hooks required by the branch folding pass. | Chris Lattner | 2006-10-20 | 1 | -22/+0 |
* | fit in 80 cols | Chris Lattner | 2006-10-18 | 1 | -12/+12 |
* | update comments | Chris Lattner | 2006-09-28 | 1 | -1/+1 |
* | Adding codegeneration for StdCall & FastCall calling conventions | Anton Korobeynikov | 2006-09-20 | 1 | -1/+9 |
* | X86ISD::CMP now produces a chain as well as a flag. Make that the chain | Evan Cheng | 2006-09-11 | 1 | -1/+1 |
* | Committing X86-64 support. | Evan Cheng | 2006-09-08 | 1 | -0/+10 |
* | Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll. | Chris Lattner | 2006-07-31 | 1 | -0/+8 |
* | Implement the inline asm 'A' constraint. This implements PR825 and | Chris Lattner | 2006-07-11 | 1 | -0/+2 |
* | X86 target specific DAG combine: turn build_vector (load x), (load x+4), | Evan Cheng | 2006-07-07 | 1 | -0/+6 |
* | Simplify X86CompilationCallback: always align to 16-byte boundary; don't save... | Evan Cheng | 2006-06-24 | 1 | -0/+16 |
* | Switch X86 over to a call-selection model where the lowering code creates | Evan Cheng | 2006-05-25 | 1 | -16/+4 |
* | Patches to make the LLVM sources more -pedantic clean. Patch provided | Chris Lattner | 2006-05-24 | 1 | -1/+1 |
* | Remove PreprocessCCCArguments and PreprocessFastCCArguments now that | Evan Cheng | 2006-05-23 | 1 | -34/+2 |
* | Implement an annoying part of the Darwin/X86 abi: the callee of a struct | Chris Lattner | 2006-05-23 | 1 | -1/+1 |
* | Should pass by reference. | Evan Cheng | 2006-05-17 | 1 | -2/+2 |
* | - Clean up formal argument lowering code. Prepare for vector pass by value work. | Evan Cheng | 2006-04-27 | 1 | -2/+23 |
* | Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. | Evan Cheng | 2006-04-26 | 1 | -2/+10 |
* | Separate LowerOperation() into multiple functions, one per opcode. | Evan Cheng | 2006-04-25 | 1 | -6/+30 |
* | Now generating perfect (I think) code for "vector set" with a single non-zero | Evan Cheng | 2006-04-21 | 1 | -7/+4 |
* | - Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1> | Evan Cheng | 2006-04-20 | 1 | -2/+10 |
* | Commute vector_shuffle to match more movlhps, movlp{s|d} cases. | Evan Cheng | 2006-04-19 | 1 | -5/+2 |
* | Last few SSE3 intrinsics. | Evan Cheng | 2006-04-14 | 1 | -0/+8 |
* | Added support for _mm_move_ss and _mm_move_sd. | Evan Cheng | 2006-04-11 | 1 | -0/+4 |
* | - movlp{s|d} and movhp{s|d} support. | Evan Cheng | 2006-04-06 | 1 | -0/+8 |
* | Support for comi / ucomi intrinsics. | Evan Cheng | 2006-04-05 | 1 | -1/+1 |
* | Handle canonical form of e.g. | Evan Cheng | 2006-04-05 | 1 | -0/+5 |
* | Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed | Evan Cheng | 2006-03-31 | 1 | -1/+5 |
* | Add support to use pextrw and pinsrw to extract and insert a word element | Evan Cheng | 2006-03-31 | 1 | -0/+4 |
* | - Added some SSE2 128-bit packed integer ops. | Evan Cheng | 2006-03-29 | 1 | -0/+18 |
* | * Prefer using operation of matching types. e.g unpcklpd rather than movlhps. | Evan Cheng | 2006-03-28 | 1 | -0/+4 |
* | - Clean up / consoladate various shuffle masks. | Evan Cheng | 2006-03-28 | 1 | -9/+4 |
* | Model unpack lower and interleave as vector_shuffle so we can lower the | Evan Cheng | 2006-03-28 | 1 | -4/+4 |
* | Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes /... | Evan Cheng | 2006-03-26 | 1 | -4/+0 |
* | Build arbitrary vector with more than 2 distinct scalar elements with a | Evan Cheng | 2006-03-25 | 1 | -0/+4 |
* | Support for scalar to vector with zero extension. | Evan Cheng | 2006-03-24 | 1 | -6/+8 |
* | Handle BUILD_VECTOR with all zero elements. | Evan Cheng | 2006-03-24 | 1 | -0/+3 |
* | More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd. | Evan Cheng | 2006-03-24 | 1 | -0/+13 |
* | Handle more shuffle cases with SHUFP* instructions. | Evan Cheng | 2006-03-24 | 1 | -4/+4 |
* | Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do | Evan Cheng | 2006-03-22 | 1 | -1/+1 |
* | - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support | Evan Cheng | 2006-03-22 | 1 | -0/+9 |
* | - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches | Evan Cheng | 2006-03-22 | 1 | -7/+8 |
* | Some splat and shuffle support. | Evan Cheng | 2006-03-22 | 1 | -0/+18 |
* | - Use movaps to store 128-bit vector integers. | Evan Cheng | 2006-03-21 | 1 | -0/+4 |
* | Added getTargetLowering() to TargetMachine. Refactored targets to support this. | Evan Cheng | 2006-03-13 | 1 | -0/+6 |
* | - Clean up the lowering and selection code of ConstantPool, GlobalAddress, | Evan Cheng | 2006-02-23 | 1 | -3/+3 |