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path: root/lib/Target/X86/X86InstrArithmetic.td
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* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-187/+144
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-20/+28
* Update LLVM for rebase to r212749.Stephen Hines2014-07-211-2/+4
* Update to LLVM 3.5a.Stephen Hines2014-04-241-92/+98
* Add disassembler support for long encodings for INC/DEC in 32-bit mode.Craig Topper2013-10-071-1/+15
* Adds support for Atom Silvermont (SLM) - -march=slmPreston Gurd2013-09-131-28/+40
* Changed register names (and pointer keywords) to be lower case when using Int...Craig Topper2013-07-311-16/+16
* Fix IMULX machine model. Multiple def operands require multiple SchedWrites.Andrew Trick2013-06-211-4/+4
* Correct the def registers for the 8bit x86 divide instructions toEric Christopher2013-06-111-4/+4
* X86: Fix Defs/Uses for insts that imp-def/imp-use both an A-register and EFLAGS.Ahmed Bougacha2013-05-291-66/+74
* Annotate the remaining x86 instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-261-2/+2
* Annotate remaining IIC_BIN_* instructions.Jakob Stoklund Olesen2013-03-201-5/+10
* Annotate X86 arithmetic instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-181-60/+112
* added basic support for Intel ADX instructionsKay Tiong Khoo2013-02-141-0/+46
* Two changes relevant to LEA and x32:David Sehr2013-02-011-2/+2
* Remove # from the beginning and end of def names.Craig Topper2013-01-071-123/+123
* Recommit r171461 which was incorrectly reverted. Mark DIV/IDIV instructions h...Craig Topper2013-01-051-1/+1
* Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap whe...Michael Gottesman2013-01-031-1/+1
* Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividi...Craig Topper2013-01-031-1/+1
* Mark the divide instructions as hasSideEffects=0.Craig Topper2012-12-271-0/+2
* Add hasSideEffects=0 to CMP*rr_REV.Craig Topper2012-12-271-0/+1
* Mark the AL/AX/EAX forms of the basic arithmetic operations has never having ...Craig Topper2012-12-261-43/+44
* Mark all the _REV instructions as not having side effects. They aren't really...Craig Topper2012-12-261-0/+1
* Simplify BMI ANDN matching to use patterns instead of a DAG combine. Also add...Craig Topper2012-12-171-2/+13
* X86: enable CSE between CMP and SUBManman Ren2012-08-081-0/+2
* X86: remove redundant cmp against zero.Manman Ren2012-07-181-1/+1
* X86: peephole optimization to remove cmp instructionManman Ren2012-07-061-0/+2
* Revert r157831Manman Ren2012-06-031-2/+0
* X86: peephole optimization to remove cmp instructionManman Ren2012-06-011-0/+2
* This patch adds X86 instruction itineraries, which were missed by thePreston Gurd2012-04-091-28/+30
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-3/+3
* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-011-94/+133
* Add X86 MULX instruction for disassembler.Craig Topper2011-10-231-0/+24
* Remove some duplicate specifying of neverHasSideEffects and mayLoad from X86 ...Craig Topper2011-10-221-5/+5
* Add X86 ANDN instruction. Including instruction selection.Craig Topper2011-10-141-1/+19
* Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies.Jakob Stoklund Olesen2011-10-081-0/+6
* Fix some Intel syntax disassembly issues with instructions that implicitly us...Craig Topper2011-10-021-19/+34
* Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SB...Craig Topper2011-09-111-4/+13
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
* Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (whichChris Lattner2010-12-201-39/+97
* it turns out that when ".with.overflow" intrinsics were added to the X86Chris Lattner2010-12-051-3/+4
* fix a subtle bug I introduced in my refactoring, where we stopped preferringChris Lattner2010-10-081-24/+36
* convert test to use the existing classes that the multipatternsChris Lattner2010-10-071-99/+48
* convert cmp to use a multipatternChris Lattner2010-10-071-199/+181
* reduce redundancy between pattern copies.Chris Lattner2010-10-071-49/+53
* the opcode for BinOpMI/BinOpMI8 is always the same, remove the argument.Chris Lattner2010-10-071-19/+19
* convert adc/sbb to a multipattern. Because the adde/sube nodes Chris Lattner2010-10-071-310/+150
* add support for isConvertibleToThreeAddress to ArithBinOpEFLAGS,Chris Lattner2010-10-071-178/+18
* Fix a few issues in ArithBinOpEFLAGS that made it specific to and.Chris Lattner2010-10-071-497/+18
* Convert 'and' to single instance of a multipatternChris Lattner2010-10-071-50/+63
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