| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | X86: Make sure we account for the FMA4 register immediate value, otherwise ri... | Benjamin Kramer | 2013-01-22 | 1 | -1/+1 |
| * | Fix execution domain for packed FMA4 instructions. | Craig Topper | 2012-11-21 | 1 | -1/+1 |
| * | Add support of RTM from TSX extension | Michael Liao | 2012-11-08 | 1 | -8/+9 |
| * | Introduce 'UseSSEx' to force SSE legacy encoding | Michael Liao | 2012-08-30 | 1 | -22/+52 |
| * | Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1. | Craig Topper | 2012-07-30 | 1 | -4/+8 |
| * | Make CVTDQ2PS instruction use SSE2 predicate instead of SSE1. No functional c... | Craig Topper | 2012-06-23 | 1 | -1/+1 |
| * | Move CVTPD2DQ to use SSE2 predicate instead of SSE3. Move DQ2PD and PD2DQ to ... | Craig Topper | 2012-06-23 | 1 | -0/+1 |
| * | Mark several instructions SSE2 instead of SSE3 as they should be. | Craig Topper | 2012-06-06 | 1 | -0/+3 |
| * | Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang. | Craig Topper | 2012-06-03 | 1 | -1/+1 |
| * | X86: Rename the CLMUL target feature to PCLMUL. | Benjamin Kramer | 2012-05-31 | 1 | -5/+5 |
| * | Added X86 Atom latencies to X86InstrMMX.td. | Preston Gurd | 2012-05-11 | 1 | -1/+1 |
| * | This patch continues the work of adding instruction latencies for X86 Atom, | Preston Gurd | 2012-05-02 | 1 | -2/+3 |
| * | Remove HasSSE2 from AES and CLMUL predicates. It's now implied by the HasAES ... | Craig Topper | 2012-05-01 | 1 | -3/+3 |
| * | Add vmfunc instruction to X86 assembler and disassembler. | Craig Topper | 2012-02-19 | 1 | -8/+9 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -3/+3 |
| * | Add X86 assembler and disassembler support for AMD SVM instructions. Original... | Craig Topper | 2012-02-18 | 1 | -0/+8 |
| * | Instruction scheduling itinerary for Intel Atom. | Andrew Trick | 2012-02-01 | 1 | -128/+144 |
| * | Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicate... | Craig Topper | 2012-01-10 | 1 | -24/+1 |
| * | Don't disable MMX support when AVX is enabled. Fix predicates for MMX instruc... | Craig Topper | 2012-01-09 | 1 | -3/+26 |
| * | Allow CRC32 instructions to be selected when AVX is enabled. | Craig Topper | 2012-01-01 | 1 | -2/+2 |
| * | Fix sfence, lfence, mfence, and clflush to be able to be selected when AVX is... | Craig Topper | 2012-01-01 | 1 | -4/+0 |
| * | Separate the concept of having memory access in operand 4 from the concept of... | Craig Topper | 2011-12-30 | 1 | -3/+3 |
| * | Fix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 ins... | Craig Topper | 2011-12-29 | 1 | -1/+1 |
| * | Mark non-VEX forms of PCLMUL instructions as requiring SSE2 to be enabled alo... | Craig Topper | 2011-12-29 | 1 | -1/+1 |
| * | Mark non-VEX forms of AES instructions as requiring SSE2 to be enabled along ... | Craig Topper | 2011-12-29 | 1 | -2/+2 |
| * | Make sure we correctly note the existence of an i8 immediate for vblendvps an... | Eli Friedman | 2011-12-15 | 1 | -1/+1 |
| * | XOP instructions and encoding tests. | Jan Sjödin | 2011-12-12 | 1 | -0/+18 |
| * | XOP encoding bits and logic. | Jan Sjödin | 2011-12-12 | 1 | -0/+5 |
| * | Remove hasSSE1orAVX(). It's the same as hasXMM(). | Evan Cheng | 2011-12-09 | 1 | -1/+1 |
| * | Many of the SSE patterns should not be selected when AVX is available. This l... | Evan Cheng | 2011-12-08 | 1 | -0/+4 |
| * | This patch contains support for encoding FMA4 instructions and | Bruno Cardoso Lopes | 2011-11-25 | 1 | -1/+9 |
| * | More AVX2 instructions and their intrinsics. | Craig Topper | 2011-11-06 | 1 | -1/+1 |
| * | Add more AVX2 instructions and intrinsics. | Craig Topper | 2011-11-06 | 1 | -0/+14 |
| * | Add X86 RORX instruction | Craig Topper | 2011-10-23 | 1 | -0/+1 |
| * | Add X86 PEXTR and PDEP instructions. | Craig Topper | 2011-10-16 | 1 | -3/+4 |
| * | Add X86 BZHI instruction as well as BMI2 feature detection. | Craig Topper | 2011-10-16 | 1 | -4/+8 |
| * | Add support in the disassembler for ignoring the L-bit on certain VEX instruc... | Craig Topper | 2011-10-04 | 1 | -1/+4 |
| * | - Handle special scalar_to_vector case: splats. Using a native 128-bit | Bruno Cardoso Lopes | 2011-07-25 | 1 | -0/+3 |
| * | Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, use... | Eli Friedman | 2011-07-05 | 1 | -0/+5 |
| * | Add support for the VIA PadLock instructions. | Joerg Sonnenberger | 2011-04-04 | 1 | -1/+3 |
| * | Expand Op0Mask by one bit in preparation for the PadLock prefixes. | Joerg Sonnenberger | 2011-04-04 | 1 | -30/+30 |
| * | Enabled disassembler support for AVX instructions | Sean Callanan | 2011-03-15 | 1 | -2/+2 |
| * | Implement xgetbv and xsetbv. | Rafael Espindola | 2011-02-22 | 1 | -0/+2 |
| * | Fix some grammar in comments I noticed. | Eric Christopher | 2010-11-30 | 1 | -5/+5 |
| * | This defaults to GenericDomain. | Eric Christopher | 2010-11-30 | 1 | -1/+1 |
| * | Implement a PseudoI class and transfer the sse instructions over to use | Eric Christopher | 2010-11-30 | 1 | -0/+5 |
| * | fix the !eq operator in tblgen to return a bit instead of an int. | Chris Lattner | 2010-10-31 | 1 | -0/+3 |
| * | Implement support for the bizarre 3DNow! encoding (which is unlike anything | Chris Lattner | 2010-10-03 | 1 | -0/+3 |
| * | fix rdar://8444631 - encoder crash on 'enter' | Chris Lattner | 2010-09-17 | 1 | -1/+2 |
| * | Fix comment typos. | Bob Wilson | 2010-08-26 | 1 | -1/+1 |
