| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Synthesize SSE3/AVX 128 bit horizontal add/sub instructions from | Duncan Sands | 2011-09-22 | 1 | -0/+2 |
| * | Add versions 256-bit versions of alignedstore and alignedload, to be | Bruno Cardoso Lopes | 2011-09-13 | 1 | -6/+17 |
| * | Format patterns, remove unused X86blend patterns | Nadav Rotem | 2011-09-12 | 1 | -3/+0 |
| * | Implement vector-select support for avx256. Refactor the vblend implementatio... | Nadav Rotem | 2011-09-09 | 1 | -8/+2 |
| * | Add AVX versions of blend vector operations and fix some issues noticed | Bruno Cardoso Lopes | 2011-09-08 | 1 | -2/+2 |
| * | Add X86-SSE4 codegen support for vector-select. | Nadav Rotem | 2011-09-08 | 1 | -1/+7 |
| * | Introduce matching patterns for vbroadcast AVX instruction. The idea is to | Bruno Cardoso Lopes | 2011-08-17 | 1 | -0/+4 |
| * | The VPERM2F128 is a AVX instruction which permutes between two 256-bit | Bruno Cardoso Lopes | 2011-08-12 | 1 | -0/+2 |
| * | Cleanup PALIGNR handling and remove the old palign pattern fragment. | Bruno Cardoso Lopes | 2011-07-29 | 1 | -5/+0 |
| * | The vpermilps and vpermilpd have different behaviour regarding the | Bruno Cardoso Lopes | 2011-07-27 | 1 | -1/+4 |
| * | Remove more dead code! | Bruno Cardoso Lopes | 2011-07-27 | 1 | -15/+5 |
| * | Recognize unpckh* masks and match 256-bit versions. The new versions are | Bruno Cardoso Lopes | 2011-07-26 | 1 | -4/+7 |
| * | Cleanup movsldup/movshdup matching. | Bruno Cardoso Lopes | 2011-07-26 | 1 | -10/+0 |
| * | - Handle special scalar_to_vector case: splats. Using a native 128-bit | Bruno Cardoso Lopes | 2011-07-25 | 1 | -0/+1 |
| * | Add support for 256-bit versions of VPERMIL instruction. This is a new | Bruno Cardoso Lopes | 2011-07-21 | 1 | -0/+2 |
| * | Port operand types for ARM and X86 over from EDIS to the .td files. | Benjamin Kramer | 2011-07-14 | 1 | -0/+2 |
| * | Make X86ISD::ANDNP more general and Codegen 256-bit VANDNP. A more | Bruno Cardoso Lopes | 2011-07-13 | 1 | -1/+1 |
| * | The target specific node PANDN name is misleading. That happens because | Bruno Cardoso Lopes | 2011-07-13 | 1 | -1/+1 |
| * | AVX Codegen support for 256-bit versions of vandps, vandpd, vorps, vorpd, vxo... | Bruno Cardoso Lopes | 2011-07-13 | 1 | -0/+1 |
| * | Reapply 132424 with fixes. This fixes PR10068. | Stuart Hastings | 2011-06-03 | 1 | -0/+2 |
| * | Revert 132424 to fix PR10068. | Rafael Espindola | 2011-06-02 | 1 | -2/+0 |
| * | Recommit 132404 with fixes. rdar://problem/5993888 | Stuart Hastings | 2011-06-01 | 1 | -0/+2 |
| * | Revert 132404 to appease a buildbot. rdar://problem/5993888 | Stuart Hastings | 2011-06-01 | 1 | -2/+0 |
| * | Add support for x86 CMPEQSS and friends. These instructions do a | Stuart Hastings | 2011-06-01 | 1 | -0/+2 |
| * | FGETSIGN support for x86, using movmskps/pd. Will be enabled with a | Stuart Hastings | 2011-06-01 | 1 | -0/+1 |
| * | [AVX] Fix mask predicates for 256-bit UNPCKLPS/D and implement | David Greene | 2011-03-02 | 1 | -0/+2 |
| * | [AVX] Support VSINSERTF128 with more patterns and appropriate | David Greene | 2011-02-04 | 1 | -0/+13 |
| * | [AVX] VEXTRACTF128 support. This commit includes patterns for | David Greene | 2011-02-03 | 1 | -0/+12 |
| * | Implement feedback from Bruno on making pblendvb an x86-specific ISD node in ... | Nate Begeman | 2010-12-20 | 1 | -0/+3 |
| * | Add support for matching psign & plendvb to the x86 target | Nate Begeman | 2010-12-17 | 1 | -0/+12 |
| * | Massive rewrite of MMX: | Dale Johannesen | 2010-09-30 | 1 | -48/+3 |
| * | give VZEXT_LOAD a memory operand, it now works with segment registers. | Chris Lattner | 2010-09-22 | 1 | -1/+1 |
| * | fix a long standing wart: all the ComplexPattern's were being | Chris Lattner | 2010-09-21 | 1 | -2/+4 |
| * | Fix typos. 128-bit PSHUFB takes 128-bit memory op. | Dale Johannesen | 2010-09-13 | 1 | -1/+1 |
| * | Reapply r113585. The msvc machine is mercurial. | Bill Wendling | 2010-09-10 | 1 | -2/+2 |
| * | r113585 was causing clang-i686-xp-msvc9 to fail in mysterious ways that I can't | Bill Wendling | 2010-09-10 | 1 | -2/+2 |
| * | Mark the sse_load_f32 and sse_load_f64 load patterns as having memoperands so | Bill Wendling | 2010-09-10 | 1 | -2/+2 |
| * | Remove unused target specific node | Bruno Cardoso Lopes | 2010-09-07 | 1 | -6/+0 |
| * | Use movlps, movlpd, movss and movsd specific nodes instead of pattern matchin... | Bruno Cardoso Lopes | 2010-09-01 | 1 | -8/+2 |
| * | Use x86 specific MOVSLDUP node, add more patterns to match it and remove usel... | Bruno Cardoso Lopes | 2010-08-31 | 1 | -6/+0 |
| * | Use MOVLHPS and MOVHLPS x86 nodes whenever possible. Also remove some useless... | Bruno Cardoso Lopes | 2010-08-31 | 1 | -5/+2 |
| * | This is the first step towards refactoring the x86 vector shuffle code. The | Bruno Cardoso Lopes | 2010-08-20 | 1 | -0/+72 |
| * | Add comments to some pattern fragments in x86 | Bruno Cardoso Lopes | 2010-08-13 | 1 | -4/+10 |
| * | Add AVX matching patterns to Packed Bit Test intrinsics. | Bruno Cardoso Lopes | 2010-08-10 | 1 | -2/+3 |
| * | Patterns to match AVX 256-bit permutation intrinsics | Bruno Cardoso Lopes | 2010-08-06 | 1 | -0/+2 |
| * | Add more 256-bit forms for a bunch of regular AVX instructions | Bruno Cardoso Lopes | 2010-07-21 | 1 | -0/+3 |
| * | Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions! | Bruno Cardoso Lopes | 2010-07-19 | 1 | -0/+1 |
| * | Move some SIMD fragment code into X86InstrFragmentsSIMD so that the | David Greene | 2010-07-12 | 1 | -0/+336 |
| * | TableGen fragment refactoring. | David Greene | 2010-02-09 | 1 | -0/+62 |
