| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Be a little bit more specific about target for the memory barrier | Eric Christopher | 2010-08-05 | 1 | -1/+2 |
| * | Make x86-64 membarriers work without sse and clean up some of the | Eric Christopher | 2010-08-04 | 1 | -2/+2 |
| * | Fix typo! | Bruno Cardoso Lopes | 2010-07-30 | 1 | -8/+8 |
| * | Temporary hack to let codegen assert or generate poor code in case | Bruno Cardoso Lopes | 2010-07-26 | 1 | -8/+13 |
| * | Add x86 CLMUL (Carry-less multiplication) cpu feature | Bruno Cardoso Lopes | 2010-07-23 | 1 | -0/+1 |
| * | Add complete assembler support for FMA3 instructions, with descriptions and e... | Bruno Cardoso Lopes | 2010-07-23 | 1 | -0/+6 |
| * | Custom lower the memory barrier instructions and add support | Eric Christopher | 2010-07-22 | 1 | -0/+29 |
| * | Pulling out previous patch, must've run the tests in | Eric Christopher | 2010-07-21 | 1 | -21/+0 |
| * | Lower MEMBARRIER on x86 and support processors without SSE2. | Eric Christopher | 2010-07-21 | 1 | -0/+21 |
| * | Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions! | Bruno Cardoso Lopes | 2010-07-19 | 1 | -1/+1 |
| * | X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same | Daniel Dunbar | 2010-07-19 | 1 | -2/+2 |
| * | X86: Mark some tail call pseduo instruction as code gen only. | Daniel Dunbar | 2010-07-19 | 1 | -1/+2 |
| * | X86: Mark In32/64BitMode on LEAVE[64] and SYSEXIT[64]. | Daniel Dunbar | 2010-07-19 | 1 | -2/+2 |
| * | X86: Mark MOV.*_{TC,NOREX} instruction as code gen only, they aren't real. | Daniel Dunbar | 2010-07-19 | 1 | -0/+4 |
| * | X86: MOV8o8a, MOV8ao8, etc. are only valid in 32-bit mode. | Daniel Dunbar | 2010-07-19 | 1 | -6/+12 |
| * | Start the support for AVX instructions with 256-bit %ymm registers. A couple of | Bruno Cardoso Lopes | 2010-07-09 | 1 | -1/+1 |
| * | have the mc lowering process handle a few tail call forms, lowering them to | Chris Lattner | 2010-07-09 | 1 | -9/+1 |
| * | Change LEA to have 5 operands for its memory operand, just | Chris Lattner | 2010-07-08 | 1 | -20/+16 |
| * | Implement the major chunk of PR7195: support for 'callw' | Chris Lattner | 2010-07-07 | 1 | -0/+7 |
| * | Add a couple more quick comments. | Eric Christopher | 2010-06-24 | 1 | -0/+2 |
| * | Update according to feedback. | Eric Christopher | 2010-06-23 | 1 | -4/+4 |
| * | Add support for the x86 instructions "pusha" and "popa". | Nico Weber | 2010-06-23 | 1 | -0/+11 |
| * | Update uses, defs, and comments for darwin tls patterns. | Eric Christopher | 2010-06-23 | 1 | -6/+5 |
| * | Finish ripping isTwoAddress out of X86. Some mindless formatting | Eric Christopher | 2010-06-19 | 1 | -132/+153 |
| * | Ensure that mov and not lea are used to stick the address into | Eric Christopher | 2010-06-08 | 1 | -2/+2 |
| * | Add first pass at darwin tls compiler support. | Eric Christopher | 2010-06-03 | 1 | -0/+17 |
| * | AsmMatcher/X86: Mark _REV instructions as "code gen only", they aren't expected | Daniel Dunbar | 2010-05-26 | 1 | -0/+14 |
| * | Fix the x86 move to/from segment register instructions. | Kevin Enderby | 2010-05-26 | 1 | -4/+12 |
| * | Rename X86 subregister indices to something shorter. | Jakob Stoklund Olesen | 2010-05-24 | 1 | -18/+18 |
| * | MC/X86: Subdivide immediates a bit more, so that we properly recognize immedi... | Daniel Dunbar | 2010-05-22 | 1 | -7/+32 |
| * | tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses ins... | Daniel Dunbar | 2010-05-22 | 1 | -5/+5 |
| * | X86: Model i64i32imm properly, as a subclass of all immediates. | Daniel Dunbar | 2010-05-20 | 1 | -1/+6 |
| * | Fix assembly parsing and encoding of the pushf and popf family of | Dan Gohman | 2010-05-20 | 1 | -4/+6 |
| * | MC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxation and to avoid same | Daniel Dunbar | 2010-05-19 | 1 | -0/+7 |
| * | Fix so "int3" is correctly accepted, added "into" and fixed "int" with an | Kevin Enderby | 2010-05-14 | 1 | -2/+4 |
| * | Set isTerminator on TRAP instructions. | Dan Gohman | 2010-05-14 | 1 | -1/+1 |
| * | Add mayLoad and mayStore flags to instructions which missed them. | Dan Gohman | 2010-05-14 | 1 | -1/+9 |
| * | reapply r103668 with a fix. Never make "minor syntax changes" | Chris Lattner | 2010-05-13 | 1 | -3/+3 |
| * | revert r103668 for now, it is apparently breaking things. | Chris Lattner | 2010-05-12 | 1 | -3/+3 |
| * | moffset forms of moves are x86-32 only, make the parser | Chris Lattner | 2010-05-12 | 1 | -3/+3 |
| * | fix the encoding of the obscure "moffset" forms of moves, i386 | Chris Lattner | 2010-05-12 | 1 | -5/+6 |
| * | MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand. | Daniel Dunbar | 2010-05-06 | 1 | -4/+4 |
| * | Eliminated the classification of control registers into %ecr_ | Sean Callanan | 2010-05-06 | 1 | -4/+4 |
| * | Fixed the encoding of the x86 push instructions. Using a 32-bit immediate value | Kevin Enderby | 2010-05-03 | 1 | -4/+4 |
| * | Remove the -disable-16bit command-line option, which is now obsolete. | Dan Gohman | 2010-04-30 | 1 | -12/+0 |
| * | Fixed the word sized Bit Scan Forward/Reverse instructions, they needed the | Kevin Enderby | 2010-04-28 | 1 | -4/+6 |
| * | Enable i16 to i32 promotion by default. | Evan Cheng | 2010-04-28 | 1 | -6/+7 |
| * | Rather than having a ton of patterns for double shift instructions, e.g. SHLD... | Evan Cheng | 2010-04-28 | 1 | -128/+0 |
| * | Fix obvious typos. | Evan Cheng | 2010-04-27 | 1 | -2/+2 |
| * | isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted. | Evan Cheng | 2010-04-21 | 1 | -1/+9 |
