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* Recommit r186813: More Intel syntax alias fixes. With the addition of suppres...Craig Topper2013-07-221-28/+28
* Revert "More Intel syntax alias fixes."Tim Northover2013-07-221-28/+28
* More Intel syntax alias fixes.Craig Topper2013-07-221-14/+14
* More Intel syntax alias fixes.Craig Topper2013-07-221-28/+28
* Add Intel variants to aliases for some FP instructions.Craig Topper2013-07-221-8/+8
* Reverse operands for Intel syntax form of 'bt' alias.Craig Topper2013-07-221-1/+2
* X86: POP*rmm: move address operand to (ins) from (outs).Ahmed Bougacha2013-06-301-3/+3
* X86: Make the cmov aliases work with intel syntax too.Benjamin Kramer2013-06-131-21/+25
* X86: Stop LEA64_32r doing unspeakable things to its arguments.Tim Northover2013-06-101-3/+2
* Revert r183069: "TMP: LEA64_32r fixing"Tim Northover2013-06-011-2/+3
* TMP: LEA64_32r fixingTim Northover2013-06-011-3/+2
* [ms-inline asm] Fix a crasher when we fail on a direct match.Chad Rosier2013-05-101-2/+5
* [ms-inline asm] Apply the condition code mnemonic aliases to both the Intel andChad Rosier2013-04-181-1/+1
* [asm parser] Add support for predicating MnemonicAlias based on the assemblerChad Rosier2013-04-181-64/+64
* Add support of RDSEED defined in AVX2 extensionMichael Liao2013-03-281-0/+19
* Skip moving call address loading into callseq when targets prefer register in...Michael Liao2013-03-281-0/+1
* Add XTEST codegen supportMichael Liao2013-03-261-0/+1
* Add HLE target featureMichael Liao2013-03-261-0/+1
* Annotate the rest of X86InstrInfo.td with SchedRW lists.Jakob Stoklund Olesen2013-03-261-27/+43
* Add PREFETCHW codegen supportMichael Liao2013-03-261-0/+2
* Add a WriteMicrocoded for ancient microcoded instructions.Jakob Stoklund Olesen2013-03-211-0/+4
* Annotate a lot of X86InstrInfo.td with SchedRW lists.Jakob Stoklund Olesen2013-03-191-26/+60
* [ms-inline asm] Add support for the pushad/popad mnemonics.Chad Rosier2013-02-251-4/+2
* added basic support for Intel ADX instructionsKay Tiong Khoo2013-02-141-0/+1
* Two changes relevant to LEA and x32:David Sehr2013-02-011-0/+13
* Remove # from the beginning and end of def names.Craig Topper2013-01-071-26/+26
* Adds missing aliases for fcom and fcomp instructions without arguments.Kevin Enderby2013-01-021-0/+2
* Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC instructions...Craig Topper2012-12-271-19/+43
* Fix operands and encoding form for ARPL instruction. Register form had and ...Craig Topper2012-12-261-2/+2
* Mark all the _REV instructions as not having side effects. They aren't really...Craig Topper2012-12-261-1/+1
* Remove EFLAGS from the BLSI/BLSMSK/BLSR patterns. The nodes created by DAG co...Craig Topper2012-12-171-11/+11
* X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches.Jim Grosbach2012-11-141-2/+2
* Add support of RTM from TSX extensionMichael Liao2012-11-081-0/+3
* Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao2012-10-151-0/+8
* Separate AVXCC and SSECC printing for cmpps/pd/ss/sd and add masking before t...Craig Topper2012-10-091-1/+1
* Remove hasNoAVX method. Can just invert hasAVX instead.Craig Topper2012-09-261-6/+6
* Revise td of X86 atomic instructionsMichael Liao2012-09-211-19/+38
* Revert r163761 "Don't fold indexed loads into TCRETURNmi64."Jakob Stoklund Olesen2012-09-131-4/+0
* Don't fold indexed loads into TCRETURNmi64.Jakob Stoklund Olesen2012-09-131-0/+4
* Update function names to conform to guidelines. No functional change intended.Chad Rosier2012-09-101-2/+2
* Introduce 'UseSSEx' to force SSE legacy encodingMichael Liao2012-08-301-0/+6
* Add HasAVX1Only predicate and use it for patterns that have an AVX1 instructi...Craig Topper2012-08-271-0/+1
* X86MemBarrier has unmodeled side effects.Jakob Stoklund Olesen2012-08-241-1/+1
* Make x86 asm parser to check for xmm vs ymm for index register in gather inst...Craig Topper2012-07-181-4/+26
* Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and ...Benjamin Kramer2012-07-121-1/+2
* Add intrinsics for Ivy Bridge's rdrand instruction.Benjamin Kramer2012-07-121-3/+10
* X86: add more GATHER intrinsics in LLVMManman Ren2012-06-291-4/+2
* X86: add GATHER intrinsics (AVX2) in LLVMManman Ren2012-06-261-0/+8
* Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.Craig Topper2012-06-031-1/+1
* Implement the local-dynamic TLS model for x86 (PR3985)Hans Wennborg2012-06-011-0/+11
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