aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/X86/X86InstrInfo.td
Commit message (Expand)AuthorAgeFilesLines
* Use correct template for ADC instruction with memory operands.Alkis Evlogimenos2004-02-291-2/+2
* SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename themAlkis Evlogimenos2004-02-281-4/+4
* Floating point loads/stores act on memory operands. Rename them toAlkis Evlogimenos2004-02-281-17/+17
* Rename instruction templates to be easier to the human eye toAlkis Evlogimenos2004-02-281-254/+254
* Each instruction now has both an ImmType and a MemType. This describesAlkis Evlogimenos2004-02-281-433/+467
* Do not generate instructions with mismatched memory/immediate sizedAlkis Evlogimenos2004-02-281-23/+23
* Further comment updates.Alkis Evlogimenos2004-02-281-4/+4
* Update comments.Alkis Evlogimenos2004-02-281-9/+9
* My previous commit broke the jit. The shift instructions always takeAlkis Evlogimenos2004-02-281-16/+16
* Fix argument size for SHL, SHR, SAR, SHLD and SHRD families ofAlkis Evlogimenos2004-02-271-34/+34
* Fix encoding of ADD and SUB family of instructions. Also rearrangeAlkis Evlogimenos2004-02-271-22/+24
* Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}.Alkis Evlogimenos2004-02-271-192/+192
* Add memory operand folding support for the SETcc family ofAlkis Evlogimenos2004-02-271-0/+13
* Add memory operand folding support for SHLD and SHRD instructions.Alkis Evlogimenos2004-02-271-0/+4
* Add memory operand folding support for SHL, SHR and SAR, SHLD instructions.Alkis Evlogimenos2004-02-271-0/+21
* Rename SHL, SHR, SAR, SHLD and SHLR instructions to make themAlkis Evlogimenos2004-02-271-13/+16
* Add a new cmove instructionChris Lattner2004-02-231-0/+1
* Fix argument size for MOVSX and MOVZX instructions.Alkis Evlogimenos2004-02-181-4/+4
* These store to memory too.Alkis Evlogimenos2004-02-171-5/+5
* These store to memory, not read from it.Chris Lattner2004-02-171-5/+5
* Add TEST and XCHG memory operand support.Alkis Evlogimenos2004-02-171-0/+16
* Add OR and XOR memory operand support.Alkis Evlogimenos2004-02-171-4/+31
* Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT,Alkis Evlogimenos2004-02-171-0/+23
* Add CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} and DECm{8,16,32} instructions.Alkis Evlogimenos2004-02-171-6/+22
* Add SUB{rm,mr,mi}{8,16,32} instructions.Alkis Evlogimenos2004-02-171-0/+12
* Add support for ADC{rm.mr}32 and SBB{rm,mr}32.Alkis Evlogimenos2004-02-171-2/+6
* Fix the mneumonics for the mov instructions to have the source and destinationChris Lattner2004-02-171-10/+10
* Fix the last crimes against nature that used the 'ir' ordering to use theChris Lattner2004-02-171-11/+11
* Rename MOVi[mr] instructions to MOV[rm]iChris Lattner2004-02-171-6/+6
* Add mem forms of AND instructionsChris Lattner2004-02-171-2/+17
* Rename the IMULri* instructions to IMULrri, as they are actually three addressChris Lattner2004-02-171-5/+13
* Add two more variants of add. Update comments.Alkis Evlogimenos2004-02-161-6/+11
* Add some ADD instructions that take memory operands for AlkisChris Lattner2004-02-161-0/+7
* Add support for the 'pop' instructionChris Lattner2004-02-141-1/+2
* Urg, right. These need an input value...Chris Lattner2004-02-141-3/+3
* add 'rep stos[bwd]' instructionsChris Lattner2004-02-141-0/+7
* Add support for the rep movs[bwd] instructions, and emit them when codeChris Lattner2004-02-121-8/+17
* IMULri* instructions do not require their first two registers operandsAlkis Evlogimenos2004-02-041-4/+6
* Add the ftst instructionChris Lattner2004-02-031-1/+3
* No need to declare implicit uses/defs of ST0Chris Lattner2004-02-021-1/+1
* Generate the fchs instruction to negate a floating point numberChris Lattner2004-02-021-0/+8
* Remove floating point killer pass. This is now implemented in theAlkis Evlogimenos2003-12-201-1/+3
* Added LLVM copyright header.John Criswell2003-10-211-0/+7
* Emit x86 instructions for: A = B op C, where A and B are 16-bit registers,Chris Lattner2003-10-201-0/+14
* * Rename X86::IMULr16 -> X86::IMULrr16Chris Lattner2003-10-201-2/+4
* Add some new instructions. WheeeChris Lattner2003-10-191-1/+21
* Add support for unconditional branches and for emitting JE instructionsChris Lattner2003-08-151-3/+15
* Add basic support for 16 and 32 bit function arguments!Chris Lattner2003-08-111-2/+14
* Add (ret int) expander so that we can at least write testcasesChris Lattner2003-08-111-0/+9
* Add patterns for multiply, and, or, and xorChris Lattner2003-08-111-22/+22