| Commit message (Expand) | Author | Age | Files | Lines |
* | Use correct template for ADC instruction with memory operands. | Alkis Evlogimenos | 2004-02-29 | 1 | -2/+2 |
* | SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them | Alkis Evlogimenos | 2004-02-28 | 1 | -4/+4 |
* | Floating point loads/stores act on memory operands. Rename them to | Alkis Evlogimenos | 2004-02-28 | 1 | -17/+17 |
* | Rename instruction templates to be easier to the human eye to | Alkis Evlogimenos | 2004-02-28 | 1 | -254/+254 |
* | Each instruction now has both an ImmType and a MemType. This describes | Alkis Evlogimenos | 2004-02-28 | 1 | -433/+467 |
* | Do not generate instructions with mismatched memory/immediate sized | Alkis Evlogimenos | 2004-02-28 | 1 | -23/+23 |
* | Further comment updates. | Alkis Evlogimenos | 2004-02-28 | 1 | -4/+4 |
* | Update comments. | Alkis Evlogimenos | 2004-02-28 | 1 | -9/+9 |
* | My previous commit broke the jit. The shift instructions always take | Alkis Evlogimenos | 2004-02-28 | 1 | -16/+16 |
* | Fix argument size for SHL, SHR, SAR, SHLD and SHRD families of | Alkis Evlogimenos | 2004-02-27 | 1 | -34/+34 |
* | Fix encoding of ADD and SUB family of instructions. Also rearrange | Alkis Evlogimenos | 2004-02-27 | 1 | -22/+24 |
* | Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}. | Alkis Evlogimenos | 2004-02-27 | 1 | -192/+192 |
* | Add memory operand folding support for the SETcc family of | Alkis Evlogimenos | 2004-02-27 | 1 | -0/+13 |
* | Add memory operand folding support for SHLD and SHRD instructions. | Alkis Evlogimenos | 2004-02-27 | 1 | -0/+4 |
* | Add memory operand folding support for SHL, SHR and SAR, SHLD instructions. | Alkis Evlogimenos | 2004-02-27 | 1 | -0/+21 |
* | Rename SHL, SHR, SAR, SHLD and SHLR instructions to make them | Alkis Evlogimenos | 2004-02-27 | 1 | -13/+16 |
* | Add a new cmove instruction | Chris Lattner | 2004-02-23 | 1 | -0/+1 |
* | Fix argument size for MOVSX and MOVZX instructions. | Alkis Evlogimenos | 2004-02-18 | 1 | -4/+4 |
* | These store to memory too. | Alkis Evlogimenos | 2004-02-17 | 1 | -5/+5 |
* | These store to memory, not read from it. | Chris Lattner | 2004-02-17 | 1 | -5/+5 |
* | Add TEST and XCHG memory operand support. | Alkis Evlogimenos | 2004-02-17 | 1 | -0/+16 |
* | Add OR and XOR memory operand support. | Alkis Evlogimenos | 2004-02-17 | 1 | -4/+31 |
* | Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT, | Alkis Evlogimenos | 2004-02-17 | 1 | -0/+23 |
* | Add CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} and DECm{8,16,32} instructions. | Alkis Evlogimenos | 2004-02-17 | 1 | -6/+22 |
* | Add SUB{rm,mr,mi}{8,16,32} instructions. | Alkis Evlogimenos | 2004-02-17 | 1 | -0/+12 |
* | Add support for ADC{rm.mr}32 and SBB{rm,mr}32. | Alkis Evlogimenos | 2004-02-17 | 1 | -2/+6 |
* | Fix the mneumonics for the mov instructions to have the source and destination | Chris Lattner | 2004-02-17 | 1 | -10/+10 |
* | Fix the last crimes against nature that used the 'ir' ordering to use the | Chris Lattner | 2004-02-17 | 1 | -11/+11 |
* | Rename MOVi[mr] instructions to MOV[rm]i | Chris Lattner | 2004-02-17 | 1 | -6/+6 |
* | Add mem forms of AND instructions | Chris Lattner | 2004-02-17 | 1 | -2/+17 |
* | Rename the IMULri* instructions to IMULrri, as they are actually three address | Chris Lattner | 2004-02-17 | 1 | -5/+13 |
* | Add two more variants of add. Update comments. | Alkis Evlogimenos | 2004-02-16 | 1 | -6/+11 |
* | Add some ADD instructions that take memory operands for Alkis | Chris Lattner | 2004-02-16 | 1 | -0/+7 |
* | Add support for the 'pop' instruction | Chris Lattner | 2004-02-14 | 1 | -1/+2 |
* | Urg, right. These need an input value... | Chris Lattner | 2004-02-14 | 1 | -3/+3 |
* | add 'rep stos[bwd]' instructions | Chris Lattner | 2004-02-14 | 1 | -0/+7 |
* | Add support for the rep movs[bwd] instructions, and emit them when code | Chris Lattner | 2004-02-12 | 1 | -8/+17 |
* | IMULri* instructions do not require their first two registers operands | Alkis Evlogimenos | 2004-02-04 | 1 | -4/+6 |
* | Add the ftst instruction | Chris Lattner | 2004-02-03 | 1 | -1/+3 |
* | No need to declare implicit uses/defs of ST0 | Chris Lattner | 2004-02-02 | 1 | -1/+1 |
* | Generate the fchs instruction to negate a floating point number | Chris Lattner | 2004-02-02 | 1 | -0/+8 |
* | Remove floating point killer pass. This is now implemented in the | Alkis Evlogimenos | 2003-12-20 | 1 | -1/+3 |
* | Added LLVM copyright header. | John Criswell | 2003-10-21 | 1 | -0/+7 |
* | Emit x86 instructions for: A = B op C, where A and B are 16-bit registers, | Chris Lattner | 2003-10-20 | 1 | -0/+14 |
* | * Rename X86::IMULr16 -> X86::IMULrr16 | Chris Lattner | 2003-10-20 | 1 | -2/+4 |
* | Add some new instructions. Wheee | Chris Lattner | 2003-10-19 | 1 | -1/+21 |
* | Add support for unconditional branches and for emitting JE instructions | Chris Lattner | 2003-08-15 | 1 | -3/+15 |
* | Add basic support for 16 and 32 bit function arguments! | Chris Lattner | 2003-08-11 | 1 | -2/+14 |
* | Add (ret int) expander so that we can at least write testcases | Chris Lattner | 2003-08-11 | 1 | -0/+9 |
* | Add patterns for multiply, and, or, and xor | Chris Lattner | 2003-08-11 | 1 | -22/+22 |