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path: root/lib/Target/X86/X86InstrMMX.td
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* X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equ...Benjamin Kramer2013-06-141-7/+8
* Reapply "Subtract isn't commutative, fix this for MMX psub." withEric Christopher2013-05-141-7/+7
* Temporarily revert "Subtract isn't commutative, fix this for MMX psub."Eric Christopher2013-05-141-7/+7
* Subtract isn't commutative, fix this for MMX psub.Eric Christopher2013-05-141-7/+7
* Annotate x87 and mmx instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-261-24/+52
* Remove IIC_DEFAULT from X86Schedule.tdJakob Stoklund Olesen2013-03-251-2/+2
* X86 MMX: optimize transfer from mmx to i32Manman Ren2012-10-301-2/+8
* Introduce 'UseSSEx' to force SSE legacy encodingMichael Liao2012-08-301-32/+33
* Remove the LowerMMXCONCAT_VECTORS function. It could never execute because th...Craig Topper2012-08-131-14/+0
* Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1.Craig Topper2012-07-301-2/+2
* Added X86 Atom latencies to X86InstrMMX.td.Preston Gurd2012-05-111-129/+274
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-011-4/+8
* Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicate...Craig Topper2012-01-101-20/+20
* Don't disable MMX support when AVX is enabled. Fix predicates for MMX instruc...Craig Topper2012-01-091-24/+24
* PR9848: pandn is not commutative.Eli Friedman2011-05-051-1/+1
* The pshufw instruction came about in MMX2 when SSE was introduced. Don't placeBill Wendling2010-10-041-3/+3
* the immediate field of pshufw is actually an 8-bit field, not a 8-bit field t...Chris Lattner2010-10-031-2/+2
* add support for the prefetch/prefetchw instructions, move femms intoChris Lattner2010-10-031-3/+1
* stub out a header to put 3dNow! instructions into.Chris Lattner2010-10-021-1/+1
* fix a regression introduced in r115243, in which the instructionChris Lattner2010-10-021-0/+16
* Massive rewrite of MMX: Dale Johannesen2010-09-301-493/+69
* Move remaining MMX instructions from SSE to MMX.Dale Johannesen2010-09-091-62/+44
* Move most MMX instructions (defined as anything thatDale Johannesen2010-09-091-1/+120
* Add intrinsic-based patterns for MMX PINSRW and PEXTRW.Dale Johannesen2010-09-081-0/+19
* Slight cleanup, use only one form of MMXI_binop_rm_int.Dale Johannesen2010-09-081-53/+37
* Add intrinsic forms of mmx<->sse conversions. Notes:Dale Johannesen2010-09-081-0/+51
* Add patterns for MMX that use the new intrinsics.Dale Johannesen2010-09-071-14/+60
* fix the encoding of MMX_MOVFR642Qrr, it starts with 0xF2 not 0xF3,Chris Lattner2010-07-151-1/+1
* rip out even more sporadic v2f32 support.Chris Lattner2010-07-051-14/+0
* Fix an mmx movd encoding.Dan Gohman2010-05-241-4/+4
* Delete MMX_MOVQ64gmr. It was the same as MMX_MOVQ64mr, but it didn'tDan Gohman2010-05-201-3/+0
* Fixed the encoding of two of the X86 movq instuctions. The Move quadword fromKevin Enderby2010-05-031-1/+1
* Add some missing x86 patterns for movdq2q. Fixes two (LLVM-)GCC DejaGNU test...Stuart Hastings2010-04-231-0/+11
* remove a bunch of dead patterns.Chris Lattner2010-03-281-13/+0
* fix a few more ambiguous types.Chris Lattner2010-03-151-2/+2
* fix some more ambiguous patterns, remove another nontemporalstoreChris Lattner2010-03-081-4/+5
* The mayHaveSideEffects flag is no longer used.Dan Gohman2010-02-271-1/+1
* remove a confused pattern that is trying to match an addressChris Lattner2010-02-231-7/+0
* X86InstrInfoSSE.td declares PINSRW as having type v8i16,Chris Lattner2010-02-231-3/+5
* TableGen fragment refactoring.David Greene2010-02-091-50/+0
* lower the last of the MRMInitReg instructions in MCInstLower.Chris Lattner2010-02-051-4/+3
* Improved widening loads by adding support for wider loads ifMon P Wang2010-01-241-0/+14
* Instruction fixes, added instructions, and AsmString changes in theSean Callanan2009-12-181-19/+24
* Rename usesCustomDAGSchedInserter to usesCustomInserter, and update aDan Gohman2009-10-291-4/+3
* Add 'isCodeGenOnly' bit to Instruction .td records.Daniel Dunbar2009-08-111-1/+1
* Whitespace, 80-column, and isTwoAddress -> Constraints = "" changes.Eric Christopher2009-08-101-32/+48
* Remove neverHasSideEffects on MMX_MOVD64rrv164 since it has a matching pattern.Evan Cheng2009-08-031-2/+1
* Use movd instead of movqRafael Espindola2009-08-031-2/+5
* Fix the instruction encoding.Rafael Espindola2009-08-031-2/+2