| Commit message (Expand) | Author | Age | Files | Lines |
* | X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equ... | Benjamin Kramer | 2013-06-14 | 1 | -7/+8 |
* | Reapply "Subtract isn't commutative, fix this for MMX psub." with | Eric Christopher | 2013-05-14 | 1 | -7/+7 |
* | Temporarily revert "Subtract isn't commutative, fix this for MMX psub." | Eric Christopher | 2013-05-14 | 1 | -7/+7 |
* | Subtract isn't commutative, fix this for MMX psub. | Eric Christopher | 2013-05-14 | 1 | -7/+7 |
* | Annotate x87 and mmx instructions with SchedRW lists. | Jakob Stoklund Olesen | 2013-03-26 | 1 | -24/+52 |
* | Remove IIC_DEFAULT from X86Schedule.td | Jakob Stoklund Olesen | 2013-03-25 | 1 | -2/+2 |
* | X86 MMX: optimize transfer from mmx to i32 | Manman Ren | 2012-10-30 | 1 | -2/+8 |
* | Introduce 'UseSSEx' to force SSE legacy encoding | Michael Liao | 2012-08-30 | 1 | -32/+33 |
* | Remove the LowerMMXCONCAT_VECTORS function. It could never execute because th... | Craig Topper | 2012-08-13 | 1 | -14/+0 |
* | Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1. | Craig Topper | 2012-07-30 | 1 | -2/+2 |
* | Added X86 Atom latencies to X86InstrMMX.td. | Preston Gurd | 2012-05-11 | 1 | -129/+274 |
* | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
* | Instruction scheduling itinerary for Intel Atom. | Andrew Trick | 2012-02-01 | 1 | -4/+8 |
* | Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicate... | Craig Topper | 2012-01-10 | 1 | -20/+20 |
* | Don't disable MMX support when AVX is enabled. Fix predicates for MMX instruc... | Craig Topper | 2012-01-09 | 1 | -24/+24 |
* | PR9848: pandn is not commutative. | Eli Friedman | 2011-05-05 | 1 | -1/+1 |
* | The pshufw instruction came about in MMX2 when SSE was introduced. Don't place | Bill Wendling | 2010-10-04 | 1 | -3/+3 |
* | the immediate field of pshufw is actually an 8-bit field, not a 8-bit field t... | Chris Lattner | 2010-10-03 | 1 | -2/+2 |
* | add support for the prefetch/prefetchw instructions, move femms into | Chris Lattner | 2010-10-03 | 1 | -3/+1 |
* | stub out a header to put 3dNow! instructions into. | Chris Lattner | 2010-10-02 | 1 | -1/+1 |
* | fix a regression introduced in r115243, in which the instruction | Chris Lattner | 2010-10-02 | 1 | -0/+16 |
* | Massive rewrite of MMX: | Dale Johannesen | 2010-09-30 | 1 | -493/+69 |
* | Move remaining MMX instructions from SSE to MMX. | Dale Johannesen | 2010-09-09 | 1 | -62/+44 |
* | Move most MMX instructions (defined as anything that | Dale Johannesen | 2010-09-09 | 1 | -1/+120 |
* | Add intrinsic-based patterns for MMX PINSRW and PEXTRW. | Dale Johannesen | 2010-09-08 | 1 | -0/+19 |
* | Slight cleanup, use only one form of MMXI_binop_rm_int. | Dale Johannesen | 2010-09-08 | 1 | -53/+37 |
* | Add intrinsic forms of mmx<->sse conversions. Notes: | Dale Johannesen | 2010-09-08 | 1 | -0/+51 |
* | Add patterns for MMX that use the new intrinsics. | Dale Johannesen | 2010-09-07 | 1 | -14/+60 |
* | fix the encoding of MMX_MOVFR642Qrr, it starts with 0xF2 not 0xF3, | Chris Lattner | 2010-07-15 | 1 | -1/+1 |
* | rip out even more sporadic v2f32 support. | Chris Lattner | 2010-07-05 | 1 | -14/+0 |
* | Fix an mmx movd encoding. | Dan Gohman | 2010-05-24 | 1 | -4/+4 |
* | Delete MMX_MOVQ64gmr. It was the same as MMX_MOVQ64mr, but it didn't | Dan Gohman | 2010-05-20 | 1 | -3/+0 |
* | Fixed the encoding of two of the X86 movq instuctions. The Move quadword from | Kevin Enderby | 2010-05-03 | 1 | -1/+1 |
* | Add some missing x86 patterns for movdq2q. Fixes two (LLVM-)GCC DejaGNU test... | Stuart Hastings | 2010-04-23 | 1 | -0/+11 |
* | remove a bunch of dead patterns. | Chris Lattner | 2010-03-28 | 1 | -13/+0 |
* | fix a few more ambiguous types. | Chris Lattner | 2010-03-15 | 1 | -2/+2 |
* | fix some more ambiguous patterns, remove another nontemporalstore | Chris Lattner | 2010-03-08 | 1 | -4/+5 |
* | The mayHaveSideEffects flag is no longer used. | Dan Gohman | 2010-02-27 | 1 | -1/+1 |
* | remove a confused pattern that is trying to match an address | Chris Lattner | 2010-02-23 | 1 | -7/+0 |
* | X86InstrInfoSSE.td declares PINSRW as having type v8i16, | Chris Lattner | 2010-02-23 | 1 | -3/+5 |
* | TableGen fragment refactoring. | David Greene | 2010-02-09 | 1 | -50/+0 |
* | lower the last of the MRMInitReg instructions in MCInstLower. | Chris Lattner | 2010-02-05 | 1 | -4/+3 |
* | Improved widening loads by adding support for wider loads if | Mon P Wang | 2010-01-24 | 1 | -0/+14 |
* | Instruction fixes, added instructions, and AsmString changes in the | Sean Callanan | 2009-12-18 | 1 | -19/+24 |
* | Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a | Dan Gohman | 2009-10-29 | 1 | -4/+3 |
* | Add 'isCodeGenOnly' bit to Instruction .td records. | Daniel Dunbar | 2009-08-11 | 1 | -1/+1 |
* | Whitespace, 80-column, and isTwoAddress -> Constraints = "" changes. | Eric Christopher | 2009-08-10 | 1 | -32/+48 |
* | Remove neverHasSideEffects on MMX_MOVD64rrv164 since it has a matching pattern. | Evan Cheng | 2009-08-03 | 1 | -2/+1 |
* | Use movd instead of movq | Rafael Espindola | 2009-08-03 | 1 | -2/+5 |
* | Fix the instruction encoding. | Rafael Espindola | 2009-08-03 | 1 | -2/+2 |