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* And now support for MMX logical operations.Bill Wendling2007-03-161-2/+36
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
* Multiplication support for MMX.Bill Wendling2007-03-151-1/+6
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* Adding more arithmetic operators to MMX. This is an almost exact copy ofBill Wendling2007-03-101-0/+10
| | | | | | | the addition. Please let me know if you have suggestions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055 91177308-0d34-0410-b5e6-96231b3b80d8
* Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so thatBill Wendling2007-03-081-0/+47
| | | | | | | moves, loads, etc. are recognized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove useless pattern fragments.Bill Wendling2007-03-071-2/+0
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* Properly support v8i8 and v4i16 types. It now converts them to v2i32 forBill Wendling2007-03-071-4/+15
| | | | | | | load and stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35002 91177308-0d34-0410-b5e6-96231b3b80d8
* Add LOAD/STORE support for MMX.Bill Wendling2007-03-061-21/+43
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* Add the emms intrinsic for MMX support.Bill Wendling2007-03-051-1/+4
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* INC / DEC instructions have shorter code size than ADD32ri8, etc.Evan Cheng2006-07-191-3/+1
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* X86 integer register classes naming changes. Make them consistent with FP, ↵Evan Cheng2006-05-161-1/+1
| | | | | | vector classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28324 91177308-0d34-0410-b5e6-96231b3b80d8
* SSE / SSE2 conversion intrinsics.Evan Cheng2006-04-121-1/+23
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* movnt* and maskmovdqu intrinsicsEvan Cheng2006-04-111-0/+25
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* Instruction encoding bugEvan Cheng2006-03-251-1/+1
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* Added CVTTPS2PI.Evan Cheng2006-03-251-0/+8
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* Didn't mean to check this in. No MMX support yet.Evan Cheng2006-03-211-3/+1
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* - Use movaps to store 128-bit vector integers.Evan Cheng2006-03-211-1/+3
| | | | | | | - Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26932 91177308-0d34-0410-b5e6-96231b3b80d8
* - Remove scalar to vector pseudo ops. They are just wrong.Evan Cheng2006-03-211-19/+0
| | | | | | | | - Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS and MOVAPD. Mark them as move instructions and *hope* they will be deleted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26919 91177308-0d34-0410-b5e6-96231b3b80d8
* x86 ISD::SCALAR_TO_VECTOR support.Evan Cheng2006-03-211-0/+18
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* Move a few things around.Evan Cheng2006-03-201-0/+10
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* One more round of reorg so sabre doesn't freak out. :-)Evan Cheng2006-02-211-22/+0
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* Split instruction info into multiple files, one for each of x87, MMX, and SSE.Evan Cheng2006-02-211-0/+57
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26300 91177308-0d34-0410-b5e6-96231b3b80d8
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