| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | fix a few more ambiguous types. | Chris Lattner | 2010-03-15 | 1 | -2/+2 |
| * | fix some more ambiguous patterns, remove another nontemporalstore | Chris Lattner | 2010-03-08 | 1 | -4/+5 |
| * | The mayHaveSideEffects flag is no longer used. | Dan Gohman | 2010-02-27 | 1 | -1/+1 |
| * | remove a confused pattern that is trying to match an address | Chris Lattner | 2010-02-23 | 1 | -7/+0 |
| * | X86InstrInfoSSE.td declares PINSRW as having type v8i16, | Chris Lattner | 2010-02-23 | 1 | -3/+5 |
| * | TableGen fragment refactoring. | David Greene | 2010-02-09 | 1 | -50/+0 |
| * | lower the last of the MRMInitReg instructions in MCInstLower. | Chris Lattner | 2010-02-05 | 1 | -4/+3 |
| * | Improved widening loads by adding support for wider loads if | Mon P Wang | 2010-01-24 | 1 | -0/+14 |
| * | Instruction fixes, added instructions, and AsmString changes in the | Sean Callanan | 2009-12-18 | 1 | -19/+24 |
| * | Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a | Dan Gohman | 2009-10-29 | 1 | -4/+3 |
| * | Add 'isCodeGenOnly' bit to Instruction .td records. | Daniel Dunbar | 2009-08-11 | 1 | -1/+1 |
| * | Whitespace, 80-column, and isTwoAddress -> Constraints = "" changes. | Eric Christopher | 2009-08-10 | 1 | -32/+48 |
| * | Remove neverHasSideEffects on MMX_MOVD64rrv164 since it has a matching pattern. | Evan Cheng | 2009-08-03 | 1 | -2/+1 |
| * | Use movd instead of movq | Rafael Espindola | 2009-08-03 | 1 | -2/+5 |
| * | Fix the instruction encoding. | Rafael Espindola | 2009-08-03 | 1 | -2/+2 |
| * | Use movq to move 64 bits in and out of mmx registers. | Rafael Espindola | 2009-08-03 | 1 | -3/+7 |
| * | Add support for MMX VSETCC. | Eli Friedman | 2009-07-22 | 1 | -0/+27 |
| * | Misc encoding fixes; reported on llvmdev. | Eli Friedman | 2009-07-09 | 1 | -4/+4 |
| * | "The MMX_MASKMOVQ and MMX_MASKMOVQ64 instructions are labeled as MRMDestMem | Bill Wendling | 2009-06-23 | 1 | -2/+2 |
| * | Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL | Eli Friedman | 2009-06-06 | 1 | -17/+0 |
| * | Get rid of a bogus pattern that interferes with optimization. | Eli Friedman | 2009-06-06 | 1 | -7/+0 |
| * | Evan says it's wrong; back out 72808. | Stuart Hastings | 2009-06-03 | 1 | -2/+0 |
| * | Recognize another euphemism for MOVDQ2Q. | Stuart Hastings | 2009-06-03 | 1 | -0/+2 |
| * | "The instructions MMX_PSADBWrm and MMX_PSADBWrr have opcode 0b11100000 (e0), but | Bill Wendling | 2009-05-28 | 1 | -1/+1 |
| * | 2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan. | Nate Begeman | 2009-04-27 | 1 | -67/+47 |
| * | Revert 69952. Causes testsuite failures on linux x86-64. | Rafael Espindola | 2009-04-24 | 1 | -47/+67 |
| * | PR2957 | Nate Begeman | 2009-04-24 | 1 | -67/+47 |
| * | Only v1i16 (i.e. _m64) is returned via RAX / RDX. | Evan Cheng | 2009-02-23 | 1 | -6/+26 |
| * | Added support for SELECT v8i8 v4i16 for X86 (MMX) | Mon P Wang | 2008-12-12 | 1 | -0/+11 |
| * | Use mmx (punpckldq VR64, (mmx_v_set0)) to clear high 32-bits of a VR64 register. | Evan Cheng | 2008-12-03 | 1 | -3/+13 |
| * | Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. | Dan Gohman | 2008-12-03 | 1 | -2/+2 |
| * | Add more vector move low and zero-extend patterns. | Evan Cheng | 2008-11-05 | 1 | -0/+9 |
| * | Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the | Bill Wendling | 2008-08-27 | 1 | -3/+3 |
| * | Nevermind. This broke the bootstrap (?!). | Bill Wendling | 2008-08-25 | 1 | -3/+3 |
| * | MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of these | Bill Wendling | 2008-08-25 | 1 | -3/+3 |
| * | Provide a 64 bit variant of mmx.maskmovq intrinsic lowering. | Anton Korobeynikov | 2008-08-23 | 1 | -0/+4 |
| * | Remove dead PatLeaf; there are a number of issues around MMX movl that need t... | Nate Begeman | 2008-07-25 | 1 | -5/+0 |
| * | Add v2f32 (MMX) type to X86. Support is primitive: | Dale Johannesen | 2008-06-24 | 1 | -0/+14 |
| * | Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq. | Evan Cheng | 2008-05-29 | 1 | -0/+6 |
| * | Handle a few more cases of folding load i64 into xmm and zero top bits. | Evan Cheng | 2008-05-09 | 1 | -4/+4 |
| * | Handle vector move / load which zero the destination register top bits (i.e. ... | Evan Cheng | 2008-05-08 | 1 | -17/+9 |
| * | Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This ... | Evan Cheng | 2008-05-03 | 1 | -14/+11 |
| * | Fix illegal MMX_MOVDQ2Qrr pattern. vector_extract result must be a scalar value. | Evan Cheng | 2008-04-25 | 1 | -2/+15 |
| * | Special handling for MMX values being passed in either GPR64 or lower 64-bits... | Evan Cheng | 2008-04-25 | 1 | -0/+4 |
| * | Fix MMX_MOVQ2DQrr pattern. It's illegal to do a bitconvert from a smaller typ... | Evan Cheng | 2008-04-25 | 1 | -2/+4 |
| * | Fix the encoding of the MMX movd that moves from MMX to 64-bit GPR. | Dan Gohman | 2008-04-21 | 1 | -1/+1 |
| * | Add movd instructions to move from MMX registers | Dan Gohman | 2008-04-15 | 1 | -0/+12 |
| * | Undo 48570. Correctly match mmx shift instructions with an immediate operand. | Evan Cheng | 2008-03-21 | 1 | -16/+24 |
| * | Add intrinsics to match mmx shift builtin's with immediate operand. | Evan Cheng | 2008-03-19 | 1 | -11/+11 |
| * | Replace all target specific implicit def instructions with a target independe... | Evan Cheng | 2008-03-15 | 1 | -13/+0 |
