| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Update aosp/master LLVM for rebase to r230699. | Stephen Hines | 2015-03-23 | 1 | -22/+44 |
| * | Update aosp/master LLVM for rebase to r222494. | Stephen Hines | 2014-12-02 | 1 | -8/+4 |
| * | Update LLVM for rebase to r212749. | Stephen Hines | 2014-07-21 | 1 | -1/+4 |
| * | Update LLVM for 3.5 rebase (r209712). | Stephen Hines | 2014-05-29 | 1 | -1/+1 |
| * | Update to LLVM 3.5a. | Stephen Hines | 2014-04-24 | 1 | -134/+171 |
| * | Changed register names (and pointer keywords) to be lower case when using Int... | Craig Topper | 2013-07-31 | 1 | -38/+38 |
| * | Add CLAC/STAC instruction encoding/decoding support | Michael Liao | 2013-04-11 | 1 | -0/+7 |
| * | fixed xsave, xsaveopt, xrstor mnemonics with intel syntax; added test cases | Kay Tiong Khoo | 2013-04-10 | 1 | -3/+3 |
| * | fixed to disassemble with tab after mnemonic rather than space | Kay Tiong Khoo | 2013-04-10 | 1 | -2/+2 |
| * | Add a catch-all WriteSystem SchedWrite type. | Jakob Stoklund Olesen | 2013-03-20 | 1 | -1/+23 |
| * | *fixed disassembly of some i386 system insts with intel syntax | Kay Tiong Khoo | 2013-02-11 | 1 | -4/+4 |
| * | Rename @llvm.debugger to @llvm.debugtrap. | Dan Gohman | 2012-05-14 | 1 | -1/+1 |
| * | Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(), | Dan Gohman | 2012-05-11 | 1 | -0/+3 |
| * | Adds Intel Atom scheduling latencies to X86InstrSystem.td. | Preston Gurd | 2012-05-04 | 1 | -138/+152 |
| * | Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax. | Bill Wendling | 2012-03-10 | 1 | -5/+5 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -3/+3 |
| * | Fix asm string wrt variants. | Devang Patel | 2012-01-09 | 1 | -6/+6 |
| * | Add intrinsics and feature flag for read/write FS/GS base instructions. Also ... | Craig Topper | 2011-10-30 | 1 | -13/+21 |
| * | Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and | Kevin Enderby | 2011-10-27 | 1 | -3/+2 |
| * | Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMR... | Craig Topper | 2011-10-16 | 1 | -0/+9 |
| * | Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE. | Craig Topper | 2011-10-07 | 1 | -0/+23 |
| * | Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT. | Craig Topper | 2011-10-07 | 1 | -0/+15 |
| * | Fix register printing in disassembling of push/pop of segment registers and i... | Craig Topper | 2011-09-22 | 1 | -38/+38 |
| * | Recognize the xstorerng alias for VIA PadLock's xstore instruction. | Joerg Sonnenberger | 2011-06-30 | 1 | -0/+2 |
| * | fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately, | Chris Lattner | 2011-04-09 | 1 | -0/+7 |
| * | Add support for the VIA PadLock instructions. | Joerg Sonnenberger | 2011-04-04 | 1 | -0/+20 |
| * | PR9377: Handle x86 str with register operand in a way consistent with gas. | Eli Friedman | 2011-03-04 | 1 | -4/+9 |
| * | Implement xgetbv and xsetbv. | Rafael Espindola | 2011-02-22 | 1 | -0/+5 |
| * | Added the x86 instruction ud2b (2nd official undefined instruction). | Kevin Enderby | 2010-10-27 | 1 | -1/+3 |
| * | Reverting r117031 to cleanup valgrind errors. | Andrew Trick | 2010-10-22 | 1 | -4/+4 |
| * | More tweaks to X86 instructions to allow the 'w' suffix in places it makes | Kevin Enderby | 2010-10-21 | 1 | -4/+4 |
| * | Added a few tweaks to the Intel Descriptor-table support instructions to allow | Kevin Enderby | 2010-10-19 | 1 | -0/+8 |
| * | move the atomic pseudo instructions out to X86InstrCompiler.td | Chris Lattner | 2010-10-05 | 1 | -0/+8 |
| * | continue moving stuff out to X86InstrSystem.td. Move | Chris Lattner | 2010-10-05 | 1 | -39/+108 |
| * | refactor .td files a bit, moving system instructions out to X86InstrSystem.td | Chris Lattner | 2010-10-05 | 1 | -0/+303 |
