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* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-22/+44
| | | | Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-8/+4
| | | | Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
* Update LLVM for rebase to r212749.Stephen Hines2014-07-211-1/+4
| | | | | | | Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-1/+1
| | | | Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
* Update to LLVM 3.5a.Stephen Hines2014-04-241-134/+171
| | | | Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
* Changed register names (and pointer keywords) to be lower case when using ↵Craig Topper2013-07-311-38/+38
| | | | | | | | | | Intel X86 assembler syntax. Patch by Richard Mitton. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187476 91177308-0d34-0410-b5e6-96231b3b80d8
* Add CLAC/STAC instruction encoding/decoding supportMichael Liao2013-04-111-0/+7
| | | | | | | | | As these two instructions in AVX extension are privileged instructions for special purpose, it's only expected to be used in inlined assembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8
* fixed xsave, xsaveopt, xrstor mnemonics with intel syntax; added test casesKay Tiong Khoo2013-04-101-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179223 91177308-0d34-0410-b5e6-96231b3b80d8
* fixed to disassemble with tab after mnemonic rather than spaceKay Tiong Khoo2013-04-101-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179215 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a catch-all WriteSystem SchedWrite type.Jakob Stoklund Olesen2013-03-201-1/+23
| | | | | | This is used for all the expensive system instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177598 91177308-0d34-0410-b5e6-96231b3b80d8
* *fixed disassembly of some i386 system insts with intel syntaxKay Tiong Khoo2013-02-111-4/+4
| | | | | | *added file for test cases for i386 intel syntax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174900 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman2012-05-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156774 91177308-0d34-0410-b5e6-96231b3b80d8
* Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman2012-05-111-0/+3
| | | | | | | but it generates int3 on x86 instead of ud2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156593 91177308-0d34-0410-b5e6-96231b3b80d8
* Adds Intel Atom scheduling latencies to X86InstrSystem.td.Preston Gurd2012-05-041-138/+152
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156194 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax.Bill Wendling2012-03-101-5/+5
| | | | | | | Patch by Kay Tiong Khoo! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152487 91177308-0d34-0410-b5e6-96231b3b80d8
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-3/+3
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix asm string wrt variants.Devang Patel2012-01-091-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147805 91177308-0d34-0410-b5e6-96231b3b80d8
* Add intrinsics and feature flag for read/write FS/GS base instructions. Also ↵Craig Topper2011-10-301-13/+21
| | | | | | add AVX2 feature flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143319 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix andKevin Enderby2011-10-271-3/+2
| | | | | | | | not depend on In32BitMode. Use the sysexitq mnemonic for the version with the REX.W prefix and only allow it only In64BitMode. rdar://9738584 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143112 91177308-0d34-0410-b5e6-96231b3b80d8
* Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, ↵Craig Topper2011-10-161-0/+9
| | | | | | VMREAD, and VMWRITE to remove hack from X86RecognizableInstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142117 91177308-0d34-0410-b5e6-96231b3b80d8
* Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE.Craig Topper2011-10-071-0/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141358 91177308-0d34-0410-b5e6-96231b3b80d8
* Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT.Craig Topper2011-10-071-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141354 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix register printing in disassembling of push/pop of segment registers and ↵Craig Topper2011-09-221-38/+38
| | | | | | in/out in Intel syntax mode. Fixes PR10960 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
* Recognize the xstorerng alias for VIA PadLock's xstore instruction.Joerg Sonnenberger2011-06-301-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134126 91177308-0d34-0410-b5e6-96231b3b80d8
* fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately,Chris Lattner2011-04-091-0/+7
| | | | | | | | InstAlias doesn't allow matching immediate operands, so we have to write C++ code to do this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129223 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the VIA PadLock instructions.Joerg Sonnenberger2011-04-041-0/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8
* PR9377: Handle x86 str with register operand in a way consistent with gas.Eli Friedman2011-03-041-4/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126970 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement xgetbv and xsetbv.Rafael Espindola2011-02-221-0/+5
| | | | | | Patch by Jai Menon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126165 91177308-0d34-0410-b5e6-96231b3b80d8
* Added the x86 instruction ud2b (2nd official undefined instruction).Kevin Enderby2010-10-271-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting r117031 to cleanup valgrind errors.Andrew Trick2010-10-221-4/+4
| | | | | | | | It doesn't look like anything is wrong with the checkin, but the new test cases expose a mem bug in AsmParser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117087 91177308-0d34-0410-b5e6-96231b3b80d8
* More tweaks to X86 instructions to allow the 'w' suffix in places it makesKevin Enderby2010-10-211-4/+4
| | | | | | | | | | sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Also added the missing flex (without the wait prefix) and ud2a as an alias to ud2 (still to add ud2b). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a few tweaks to the Intel Descriptor-table support instructions to allowKevin Enderby2010-10-191-0/+8
| | | | | | | | word forms and suffixed versions to match the darwin assembler in 32-bit and 64-bit modes. This is again for use just with assembly source for llvm-mc . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
* move the atomic pseudo instructions out to X86InstrCompiler.tdChris Lattner2010-10-051-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115599 91177308-0d34-0410-b5e6-96231b3b80d8
* continue moving stuff out to X86InstrSystem.td. MoveChris Lattner2010-10-051-39/+108
| | | | | | | | | control flow stuff out to X86InstrControl.td. Move some compiler pseudo instructions and Pat<> patterns out to X86InstrCompiler.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115596 91177308-0d34-0410-b5e6-96231b3b80d8
* refactor .td files a bit, moving system instructions out to X86InstrSystem.tdChris Lattner2010-10-051-0/+303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115591 91177308-0d34-0410-b5e6-96231b3b80d8
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