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path: root/lib/Target/X86/X86RegisterInfo.cpp
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* Change instruction description to split OperandList into OutOperandList andEvan Cheng2007-07-191-2/+2
* Only adjust esp around calls in presence of alloca.Evan Cheng2007-07-191-5/+10
* Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if pre...Evan Cheng2007-07-181-13/+19
* Fold prologue esp update when possible.Evan Cheng2007-07-171-1/+22
* Make sure not to break eh_return.Evan Cheng2007-07-171-9/+10
* Missed the case where alloca is used but the stack size (not including callee...Evan Cheng2007-07-171-17/+17
* Use push / pop for prologues and epilogues.Evan Cheng2007-07-171-89/+135
* Long live the exception handling!Anton Korobeynikov2007-07-141-6/+52
* Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp,Dan Gohman2007-07-101-0/+20
* Refactor X87 instructions. As a side effect, allDale Johannesen2007-07-041-6/+6
* Fix for PR 1505 (and 1489). Rewrite X87 registerDale Johannesen2007-07-031-4/+10
* More DWARF-related things cleanup:Anton Korobeynikov2007-05-121-7/+10
* Emit correct register move information in eh frames for X86. This allows Shoo...Anton Korobeynikov2007-05-021-8/+43
* Emit correct DWARF reg # for RA (return address) registerAnton Korobeynikov2007-05-021-1/+4
* eliminateFrameIndex() change.Evan Cheng2007-05-011-1/+3
* Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add...Evan Cheng2007-04-261-18/+27
* do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292Chris Lattner2007-04-251-1/+2
* support for >4G stack framesChris Lattner2007-04-251-3/+4
* support >4G stack framesChris Lattner2007-04-251-9/+9
* Add the PADDQ to the list.Bill Wendling2007-04-241-0/+1
* rename X86FunctionInfo to X86MachineFunctionInfo to match the header fileChris Lattner2007-04-171-1/+1
* Implemented correct stack probing on mingw/cygwin for dynamic alloca's.Anton Korobeynikov2007-04-171-4/+29
* Changed to new MMX_ recipes.Bill Wendling2007-04-031-3/+3
* Added MRegisterInfo hook to re-materialize an instruction.Evan Cheng2007-03-201-0/+10
* Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so thatBill Wendling2007-03-081-0/+6
* PEI now passes a RegScavenger ptr to eliminateFrameIndex.Evan Cheng2007-02-281-1/+2
* By default, spills kills the register being stored.Evan Cheng2007-02-231-1/+2
* Support to provide exception and selector registers.Jim Laskey2007-02-211-0/+10
* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-191-0/+16
* For PR1207:Reid Spencer2007-02-191-16/+0
* Added getReservedRegs().Evan Cheng2007-02-171-0/+16
* Only gather frame info if debug or eh.Jim Laskey2007-01-291-2/+2
* Landing pad-less eh for PPC.Jim Laskey2007-01-291-4/+3
* Change the MachineDebugInfo to MachineModuleInfo to better reflect usageJim Laskey2007-01-261-7/+7
* Make LABEL a builtin opcode.Jim Laskey2007-01-261-2/+2
* Call frames for intel.Jim Laskey2007-01-241-0/+51
* 80 columnsJim Laskey2007-01-241-4/+8
* PEI is now responsible for adding MaxCallFrameSize to frame size and align th...Evan Cheng2007-01-231-17/+0
* hasFP() is now a virtual method of MRegisterInfo.Evan Cheng2007-01-231-2/+2
* One more try...Evan Cheng2007-01-201-2/+3
* Last check-in was bogus. There is no need to align the stack if the function ...Evan Cheng2007-01-201-3/+6
* Backend is reponsible for aligning the stack.Evan Cheng2007-01-201-7/+5
* * PIC codegen for X86/Linux has been implementedAnton Korobeynikov2007-01-121-0/+4
* Really big cleanup.Anton Korobeynikov2007-01-031-2/+2
* Fix naming inconsistency.Evan Cheng2007-01-021-8/+8
* f64 <-> i64 bit_convert using movq in 64-bit mode.Evan Cheng2006-12-141-0/+2
* Added MOVSS2DIrr and MOVDI2SSrr to foldMemeoryOperand().Evan Cheng2006-12-141-0/+2
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-6/+4
* MI keeps a ptr of TargetInstrDescriptor, use it.Evan Cheng2006-12-071-1/+2
* Match TargetInstrInfo changes.Evan Cheng2006-12-011-1/+1