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path: root/lib/Target/X86/X86RegisterInfo.cpp
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* [PEI] Pass the frame index operand number to the eliminateFrameIndex function.Chad Rosier2013-01-311-15/+10
* In this patch, we teach X86_64TargetMachine that it has a ILP32Eli Bendersky2013-01-251-4/+5
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-3/+3
* Remove the Function::getFnAttributes method in favor of using the AttributeSetBill Wendling2012-12-301-1/+2
* MC: Add MCInstrDesc::mayAffectControlFlow() method.Jim Grosbach2012-12-191-3/+5
* Rename the 'Attributes' class to 'Attribute'. It's going to represent a singl...Bill Wendling2012-12-191-1/+1
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-10/+10
* Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.Chad Rosier2012-11-261-43/+0
* Add the Erlang/HiPE calling convention, patch by Yiannis Tsiouris.Duncan Sands2012-11-161-2/+9
* Special calling conventions for Intel OpenCL built-in library.Elena Demikhovsky2012-10-241-0/+21
* Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao2012-10-151-0/+5
* Create enums for the different attributes.Bill Wendling2012-10-091-2/+3
* Add register encoding support in X86 backendMichael Liao2012-10-041-17/+1
* Change getX86SubSuperRegister to take an MVT::SimpleValueType rather than an ...Craig Topper2012-09-301-7/+8
* Remove the `hasFnAttr' method from Function.Bill Wendling2012-09-261-1/+1
* Add missing space before {. No functionality change.Nick Lewycky2012-09-091-1/+1
* Whitespace.Chad Rosier2012-08-011-2/+2
* [x86 frame lowering] In 32-bit mode, use ESI as the base pointer.Chad Rosier2012-07-311-2/+4
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-07-101-10/+51
* Temporarily revert r158087.Chandler Carruth2012-06-181-50/+10
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-06-061-10/+50
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-011-5/+4
* Put the shiny new MCSubRegIterator to work.Chad Rosier2012-06-011-8/+6
* s/CSR_Ghc/CSR_NoRegs/Jakob Stoklund Olesen2012-05-081-2/+2
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-071-1/+2
* This patch marks the X86 floating point stack registers ST0-ST7 as reservedPreston Gurd2012-05-011-0/+10
* This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd2012-04-231-0/+6
* Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-1/+1
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-171-1/+1
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-3/+3
* Use uint16_t to store registers in callee saved register tables to reduce siz...Craig Topper2012-03-041-1/+1
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-4/+0
* Move X86 callee saved register lists to the X86CallConv .td file.Jakob Stoklund Olesen2012-01-171-37/+21
* Emit a getMatchingSuperRegClass() implementation for every target.Jakob Stoklund Olesen2011-12-191-114/+6
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-1/+1
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-021-1/+1
* For 64-bit the rest of the general regs are ok for the q constraint. MakeEric Christopher2011-12-011-1/+17
* Prevent potential NOREX bug.Jakob Stoklund Olesen2011-10-081-0/+11
* Override TRI::getSubClassWithSubReg for X86.Jakob Stoklund Olesen2011-10-051-0/+12
* Store sub-class lists as a bit vector.Jakob Stoklund Olesen2011-09-301-1/+1
* Fix PR10884.Bruno Cardoso Lopes2011-09-161-1/+1
* Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng2011-07-181-1/+0
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-133/+8
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-1/+0
* Fix up assertion in r135018 so it doesn't trigger on 32-bit; when we're in 32...Eli Friedman2011-07-141-1/+2
* Add an assert (which should never trigger) that triggers on a testcase I'm lo...Eli Friedman2011-07-131-1/+3
* Constify getCompactUnwindRegNum.Bill Wendling2011-07-061-2/+2
* Use the correct registers on X86_64.Bill Wendling2011-06-301-4/+4
* Add target a target hook to get the register number used by the compact unwindBill Wendling2011-06-301-0/+15