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path: root/lib/Target/X86/X86RegisterInfo.cpp
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* [Stackmap] Add AnyReg calling convention support for patchpoint intrinsic.Juergen Ributzka2013-11-081-0/+6
* Fix the ExecutionDepsFix pass to handle AVX instructions.Andrew Trick2013-10-141-2/+2
* Remove getEHExceptionRegister and getEHHandlerRegister.Rafael Espindola2013-10-071-8/+0
* Use function attributes to indicate that we don't want to realign the stack.Bill Wendling2013-08-011-2/+3
* Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-281-1/+0
* Take advantage of the register enums being in order to remove a couple static...Craig Topper2013-07-261-18/+4
* I'm starting to commit KNL backend. I'll push patches one-by-one. This patch ...Elena Demikhovsky2013-07-241-0/+28
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-3/+2
* Don't assume the registers will be enumerated sequentially.Chad Rosier2013-05-291-2/+5
* Simplify logic now that r182490 is in place. No functional change intended.Chad Rosier2013-05-221-8/+8
* x86_64: designate most general purpose and SSE registers as callee save under...Peter Collingbourne2013-02-221-21/+25
* Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky2013-02-211-101/+0
* getX86SubSuperRegister has a special mode with High=true for i64 whichEli Bendersky2013-02-211-17/+9
* [ms-inline asm] Make the comment a bit more verbose.Chad Rosier2013-02-201-2/+6
* [ms-inline asm] Force the use of a base pointer if the MachineFunction includesChad Rosier2013-02-191-2/+4
* Make helpers static. Add missing include so LLVMInitializeObjCARCOpts gets C ...Benjamin Kramer2013-02-151-1/+1
* [PEI] Pass the frame index operand number to the eliminateFrameIndex function.Chad Rosier2013-01-311-15/+10
* In this patch, we teach X86_64TargetMachine that it has a ILP32Eli Bendersky2013-01-251-4/+5
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-3/+3
* Remove the Function::getFnAttributes method in favor of using the AttributeSetBill Wendling2012-12-301-1/+2
* MC: Add MCInstrDesc::mayAffectControlFlow() method.Jim Grosbach2012-12-191-3/+5
* Rename the 'Attributes' class to 'Attribute'. It's going to represent a singl...Bill Wendling2012-12-191-1/+1
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-10/+10
* Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.Chad Rosier2012-11-261-43/+0
* Add the Erlang/HiPE calling convention, patch by Yiannis Tsiouris.Duncan Sands2012-11-161-2/+9
* Special calling conventions for Intel OpenCL built-in library.Elena Demikhovsky2012-10-241-0/+21
* Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao2012-10-151-0/+5
* Create enums for the different attributes.Bill Wendling2012-10-091-2/+3
* Add register encoding support in X86 backendMichael Liao2012-10-041-17/+1
* Change getX86SubSuperRegister to take an MVT::SimpleValueType rather than an ...Craig Topper2012-09-301-7/+8
* Remove the `hasFnAttr' method from Function.Bill Wendling2012-09-261-1/+1
* Add missing space before {. No functionality change.Nick Lewycky2012-09-091-1/+1
* Whitespace.Chad Rosier2012-08-011-2/+2
* [x86 frame lowering] In 32-bit mode, use ESI as the base pointer.Chad Rosier2012-07-311-2/+4
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-07-101-10/+51
* Temporarily revert r158087.Chandler Carruth2012-06-181-50/+10
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-06-061-10/+50
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-011-5/+4
* Put the shiny new MCSubRegIterator to work.Chad Rosier2012-06-011-8/+6
* s/CSR_Ghc/CSR_NoRegs/Jakob Stoklund Olesen2012-05-081-2/+2
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-071-1/+2
* This patch marks the X86 floating point stack registers ST0-ST7 as reservedPreston Gurd2012-05-011-0/+10
* This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd2012-04-231-0/+6
* Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-1/+1
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-171-1/+1
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-3/+3
* Use uint16_t to store registers in callee saved register tables to reduce siz...Craig Topper2012-03-041-1/+1
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-4/+0
* Move X86 callee saved register lists to the X86CallConv .td file.Jakob Stoklund Olesen2012-01-171-37/+21