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path: root/lib/Target/X86/X86RegisterInfo.td
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* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-18/+26
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-19/+22
* Update to LLVM 3.5a.Stephen Hines2014-04-241-4/+8
* I'm starting to commit KNL backend. I'll push patches one-by-one. This patch ...Elena Demikhovsky2013-07-241-17/+65
* X86: sub_xmm registers are 128 bits wide.Ahmed Bougacha2013-06-031-1/+1
* Add a way to define the bit range covered by a SubRegIndex.Ahmed Bougacha2013-05-311-5/+5
* Add register encoding support in X86 backendMichael Liao2012-10-041-245/+251
* Remove the X86 sub_ss and sub_sd sub-register indexes completely.Jakob Stoklund Olesen2012-07-261-6/+1
* Remove the SubRegClasses field from RegisterClass descriptions.Jakob Stoklund Olesen2012-05-041-78/+19
* X86: Don't emit conditional floating point moves on when targeting pre-pentiu...Benjamin Kramer2012-04-271-0/+7
* Remove the YMM_HI_6_15 hack.Jakob Stoklund Olesen2012-02-161-7/+0
* Handle call-clobbered ymm registers on Win64.Jakob Stoklund Olesen2012-01-261-0/+7
* Add a CoveredBySubRegs property to Register descriptions.Jakob Stoklund Olesen2012-01-181-1/+1
* Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 6...Craig Topper2011-10-071-14/+4
* Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This w...Craig Topper2011-10-061-0/+17
* Add v16i16 type to VR256 classBruno Cardoso Lopes2011-07-211-2/+2
* Clean up the handling of the x87 fp stack to make it more robust.Jakob Stoklund Olesen2011-06-281-9/+16
* Switch x86 to using AltOrders instead of MethodBodies.Jakob Stoklund Olesen2011-06-181-67/+6
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-151-60/+41
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-091-200/+2
* Flag unallocatable register classes instead of giving them emptyJakob Stoklund Olesen2011-06-021-20/+2
* Introduce the DwarfRegAlias class for declaring that two registers have theRafael Espindola2011-05-301-16/+16
* Mark the 32 bit registers as invalid in 64 bit mode. In 64 bit mode they areRafael Espindola2011-05-301-9/+9
* Add 132187 back now that the real problem is fixed.Rafael Espindola2011-05-281-45/+45
* It looks like 132187 might have broken the llvm-gcc bootstrap. Revert while I...Rafael Espindola2011-05-271-45/+45
* Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegC...Cameron Zwarich2011-05-271-1/+9
* Delete MethodBodies that only filtered reserved registers.Jakob Stoklund Olesen2011-05-271-111/+0
* Remove dwarf numbers from subregs. We should use DW_OP_bit_piece toRafael Espindola2011-05-271-45/+45
* Fix PR9978 by adding RIP to GR64_TC so it can be used as an address in PIC co...Cameron Zwarich2011-05-211-1/+1
* Prefer cheap registers for busy live ranges.Jakob Stoklund Olesen2011-04-201-7/+13
* Target/X86: Tweak win64's tailcall.NAKAMURA Takumi2011-01-261-0/+3
* Fix whitespace.NAKAMURA Takumi2011-01-261-12/+12
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a...Anton Korobeynikov2011-01-101-10/+10
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-23/+23
* random acts of tidiness.Chris Lattner2010-11-141-10/+5
* lets go all meta and define new X86 type wrappers that declare the associatedChris Lattner2010-10-061-22/+12
* associate the instruction suffix letter with the integer gpr Chris Lattner2010-10-051-12/+22
* Massive rewrite of MMX: Dale Johannesen2010-09-301-1/+1
* fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"Chris Lattner2010-09-221-2/+10
* Make %EFLAGS unallocatable.Jakob Stoklund Olesen2010-08-311-0/+11
* Support x86 "eiz" and "riz" pseudo index registers in the assembler.Bruno Cardoso Lopes2010-07-241-0/+4
* Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!Bruno Cardoso Lopes2010-07-191-1/+1
* Declare YMM subregisters in the right way! Thanks JakobBruno Cardoso Lopes2010-07-091-2/+1
* Start the support for AVX instructions with 256-bit %ymm registers. A couple ofBruno Cardoso Lopes2010-07-091-8/+25
* rip out even more sporadic v2f32 support.Chris Lattner2010-07-051-1/+1
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-71/+16
* Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen2010-05-261-16/+71
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-71/+16
* Remove NumberHack entirely.Jakob Stoklund Olesen2010-05-251-8/+8
* Switch SubRegSet to using symbolic SubRegIndicesJakob Stoklund Olesen2010-05-241-63/+63
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