| Commit message (Expand) | Author | Age | Files | Lines |
* | Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 6... | Craig Topper | 2011-10-07 | 1 | -14/+4 |
* | Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This w... | Craig Topper | 2011-10-06 | 1 | -0/+17 |
* | Add v16i16 type to VR256 class | Bruno Cardoso Lopes | 2011-07-21 | 1 | -2/+2 |
* | Clean up the handling of the x87 fp stack to make it more robust. | Jakob Stoklund Olesen | 2011-06-28 | 1 | -9/+16 |
* | Switch x86 to using AltOrders instead of MethodBodies. | Jakob Stoklund Olesen | 2011-06-18 | 1 | -67/+6 |
* | Use set operations instead of plain lists to enumerate register classes. | Jakob Stoklund Olesen | 2011-06-15 | 1 | -60/+41 |
* | Remove custom allocation order boilerplate that is no longer needed. | Jakob Stoklund Olesen | 2011-06-09 | 1 | -200/+2 |
* | Flag unallocatable register classes instead of giving them empty | Jakob Stoklund Olesen | 2011-06-02 | 1 | -20/+2 |
* | Introduce the DwarfRegAlias class for declaring that two registers have the | Rafael Espindola | 2011-05-30 | 1 | -16/+16 |
* | Mark the 32 bit registers as invalid in 64 bit mode. In 64 bit mode they are | Rafael Espindola | 2011-05-30 | 1 | -9/+9 |
* | Add 132187 back now that the real problem is fixed. | Rafael Espindola | 2011-05-28 | 1 | -45/+45 |
* | It looks like 132187 might have broken the llvm-gcc bootstrap. Revert while I... | Rafael Espindola | 2011-05-27 | 1 | -45/+45 |
* | Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegC... | Cameron Zwarich | 2011-05-27 | 1 | -1/+9 |
* | Delete MethodBodies that only filtered reserved registers. | Jakob Stoklund Olesen | 2011-05-27 | 1 | -111/+0 |
* | Remove dwarf numbers from subregs. We should use DW_OP_bit_piece to | Rafael Espindola | 2011-05-27 | 1 | -45/+45 |
* | Fix PR9978 by adding RIP to GR64_TC so it can be used as an address in PIC co... | Cameron Zwarich | 2011-05-21 | 1 | -1/+1 |
* | Prefer cheap registers for busy live ranges. | Jakob Stoklund Olesen | 2011-04-20 | 1 | -7/+13 |
* | Target/X86: Tweak win64's tailcall. | NAKAMURA Takumi | 2011-01-26 | 1 | -0/+3 |
* | Fix whitespace. | NAKAMURA Takumi | 2011-01-26 | 1 | -12/+12 |
* | Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a... | Anton Korobeynikov | 2011-01-10 | 1 | -10/+10 |
* | Move hasFP() and few related hooks to TargetFrameInfo. | Anton Korobeynikov | 2010-11-18 | 1 | -23/+23 |
* | random acts of tidiness. | Chris Lattner | 2010-11-14 | 1 | -10/+5 |
* | lets go all meta and define new X86 type wrappers that declare the associated | Chris Lattner | 2010-10-06 | 1 | -22/+12 |
* | associate the instruction suffix letter with the integer gpr | Chris Lattner | 2010-10-05 | 1 | -12/+22 |
* | Massive rewrite of MMX: | Dale Johannesen | 2010-09-30 | 1 | -1/+1 |
* | fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8" | Chris Lattner | 2010-09-22 | 1 | -2/+10 |
* | Make %EFLAGS unallocatable. | Jakob Stoklund Olesen | 2010-08-31 | 1 | -0/+11 |
* | Support x86 "eiz" and "riz" pseudo index registers in the assembler. | Bruno Cardoso Lopes | 2010-07-24 | 1 | -0/+4 |
* | Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions! | Bruno Cardoso Lopes | 2010-07-19 | 1 | -1/+1 |
* | Declare YMM subregisters in the right way! Thanks Jakob | Bruno Cardoso Lopes | 2010-07-09 | 1 | -2/+1 |
* | Start the support for AVX instructions with 256-bit %ymm registers. A couple of | Bruno Cardoso Lopes | 2010-07-09 | 1 | -8/+25 |
* | rip out even more sporadic v2f32 support. | Chris Lattner | 2010-07-05 | 1 | -1/+1 |
* | Replace the SubRegSet tablegen class with a less error-prone mechanism. | Jakob Stoklund Olesen | 2010-05-26 | 1 | -71/+16 |
* | Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism." | Jakob Stoklund Olesen | 2010-05-26 | 1 | -16/+71 |
* | Replace the SubRegSet tablegen class with a less error-prone mechanism. | Jakob Stoklund Olesen | 2010-05-26 | 1 | -71/+16 |
* | Remove NumberHack entirely. | Jakob Stoklund Olesen | 2010-05-25 | 1 | -8/+8 |
* | Switch SubRegSet to using symbolic SubRegIndices | Jakob Stoklund Olesen | 2010-05-24 | 1 | -63/+63 |
* | Replace the tablegen RegisterClass field SubRegClassList with an alist-like data | Jakob Stoklund Olesen | 2010-05-24 | 1 | -17/+36 |
* | Rename X86 subregister indices to something shorter. | Jakob Stoklund Olesen | 2010-05-24 | 1 | -8/+8 |
* | Add the SubRegIndex TableGen class. | Jakob Stoklund Olesen | 2010-05-24 | 1 | -9/+11 |
* | Eliminated the classification of control registers into %ecr_ | Sean Callanan | 2010-05-06 | 1 | -26/+11 |
* | Fix PR6696 and PR6663 | Jim Grosbach | 2010-04-06 | 1 | -13/+25 |
* | Do not force indirect tailcall through fixed registers: eax, r11. Add support... | Evan Cheng | 2010-03-14 | 1 | -0/+7 |
* | Implement XMM subregs. | Dan Gohman | 2010-02-28 | 1 | -18/+45 |
* | Remove SIL, DIL, and BPL from the GR8_NOREX allocation order also. | Dan Gohman | 2010-01-26 | 1 | -11/+5 |
* | SIL, DIL, BPL, and SPL require a REX prefix. | Dan Gohman | 2010-01-26 | 1 | -6/+3 |
* | Instruction fixes, added instructions, and AsmString changes in the | Sean Callanan | 2009-12-18 | 1 | -1/+48 |
* | Add RIP to GR64_NOREX. This fixed a MachineVerifier error when RIP | Dan Gohman | 2009-10-05 | 1 | -5/+5 |
* | Added a new register class for segment registers | Sean Callanan | 2009-09-15 | 1 | -0/+5 |
* | Minor whitespace tidiness. | Dan Gohman | 2009-07-30 | 1 | -3/+0 |