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lib
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Target
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X86
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X86SchedSandyBridge.td
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Author
Age
Files
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*
Update aosp/master LLVM for rebase to r222494.
Stephen Hines
2014-12-02
1
-0
/
+1
*
Update LLVM for 3.5 rebase (r209712).
Stephen Hines
2014-05-29
1
-0
/
+3
*
Update to LLVM 3.5a.
Stephen Hines
2014-04-24
1
-0
/
+115
*
Mark the x86 machine model as incomplete. PR17367.
Andrew Trick
2013-09-25
1
-0
/
+4
*
Fix IMULX machine model. Multiple def operands require multiple SchedWrites.
Andrew Trick
2013-06-21
1
-0
/
+1
*
Support BufferSize on ProcResGroup for unified MOp schedulers.
Andrew Trick
2013-06-15
1
-0
/
+5
*
Update machine models. Specify buffer sizes for OOO processors.
Andrew Trick
2013-06-15
1
-1
/
+1
*
Machine Model: Add MicroOpBufferSize and resource BufferSize.
Andrew Trick
2013-06-15
1
-1
/
+0
*
X86 machine model: reduce SandyBridge and Haswell ILPWindow.
Andrew Trick
2013-04-13
1
-1
/
+1
*
The divide unit is not pipeline, but it is still buffered.
Andrew Trick
2013-04-02
1
-2
/
+2
*
Remove the unused port from the SandyBridge machine model
Nadav Rotem
2013-03-28
1
-1
/
+0
*
Add a scheduling model for Intel Sandy Bridge microarchitecture.
Jakob Stoklund Olesen
2013-03-25
1
-0
/
+123