| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Fix IMULX machine model. Multiple def operands require multiple SchedWrites. | Andrew Trick | 2013-06-21 | 1 | -0/+1 |
| * | Support BufferSize on ProcResGroup for unified MOp schedulers. | Andrew Trick | 2013-06-15 | 1 | -0/+5 |
| * | Update machine models. Specify buffer sizes for OOO processors. | Andrew Trick | 2013-06-15 | 1 | -1/+1 |
| * | Machine Model: Add MicroOpBufferSize and resource BufferSize. | Andrew Trick | 2013-06-15 | 1 | -1/+0 |
| * | X86 machine model: reduce SandyBridge and Haswell ILPWindow. | Andrew Trick | 2013-04-13 | 1 | -1/+1 |
| * | The divide unit is not pipeline, but it is still buffered. | Andrew Trick | 2013-04-02 | 1 | -2/+2 |
| * | Remove the unused port from the SandyBridge machine model | Nadav Rotem | 2013-03-28 | 1 | -1/+0 |
| * | Add a scheduling model for Intel Sandy Bridge microarchitecture. | Jakob Stoklund Olesen | 2013-03-25 | 1 | -0/+123 |
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