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path: root/lib/Target/X86/X86Subtarget.cpp
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* Mac OS X X86-64 low 4G address not available.Evan Cheng2007-08-011-0/+4
* Here is the bulk of the sanitizing.Gabor Greif2007-07-051-1/+1
* In the event that some really old non-Intel or -AMD CPU is encountered...Jeff Cohen2007-04-161-2/+5
* Before assuming that the original code didn't work for Athlon64, the person whoJeff Cohen2007-04-161-6/+2
* Add support for our first SSSE3 instruction "pmulhrsw".Bill Wendling2007-04-101-0/+1
* Autodetect MMX & SSE stuff for AMD processorsAnton Korobeynikov2007-03-231-10/+11
* For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoidReid Spencer2007-01-301-2/+2
* Propagate changes from my local tree. This patch includes:Anton Korobeynikov2007-01-281-0/+1
* Linux GOT indirect reference is only necessary in PIC mode.Evan Cheng2007-01-221-1/+1
* * Fix one more bug in PIC codegen: extra load is needed for *all*Anton Korobeynikov2007-01-171-1/+5
* * PIC codegen for X86/Linux has been implementedAnton Korobeynikov2007-01-121-7/+8
* Really big cleanup.Anton Korobeynikov2007-01-031-4/+8
* Refactored JIT codegen for mingw32. Now we're using standart relocationAnton Korobeynikov2006-12-221-12/+3
* Fixed 80 cols & style violationAnton Korobeynikov2006-12-201-2/+4
* Fixed dllimported symbols support during JIT'ing. JIT on mingw32Anton Korobeynikov2006-12-201-7/+18
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-4/+3
* Factor out GVRequiresExtraLoad() from .h to .cppAnton Korobeynikov2006-11-301-0/+17
* 16-byte stack alignment for X86-64 ELF. Patch by Dan Gohman.Evan Cheng2006-11-291-1/+3
* Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bitChris Lattner2006-11-201-8/+17
* Use movl+xchgl instead of pushl+popl.Evan Cheng2006-11-081-3/+2
* Proper fix.Evan Cheng2006-10-171-5/+4
* Proper fix for rdar://problem/4770604 Thanks to Stuart Hastings!Evan Cheng2006-10-161-12/+13
* 80 col violation.Evan Cheng2006-10-061-3/+4
* Still need to support -mcpu=<> or cross compilation will fail. Doh.Evan Cheng2006-10-061-3/+104
* Do away with CPU feature list. Just use CPUID to detect MMX, SSE, SSE2, SSE3,...Evan Cheng2006-10-061-90/+15
* It appears the inline asm in GetCpuIDAndInfo() may clobbers some registers if...Evan Cheng2006-10-061-3/+3
* Formating.Evan Cheng2006-10-041-1/+1
* Committing X86-64 support.Evan Cheng2006-09-081-15/+32
* Fix a cross-build issue. The asmsyntax shouldn't be affected by the buildChris Lattner2006-09-071-8/+12
* Make the x86 asm flavor part of the subtarget info.Jim Laskey2006-09-071-0/+16
* Later models likely to have Yonah like attributes.Evan Cheng2006-06-161-1/+2
* X86 / Cygwin asm / alignment fixes.Evan Cheng2006-05-251-1/+1
* x86 / Darwin PIC support.Evan Cheng2006-02-181-4/+1
* A bit more memset / memcpy optimization.Evan Cheng2006-02-161-0/+2
* DuhEvan Cheng2006-02-141-3/+0
* Remove -disable-x86-sseEvan Cheng2006-02-141-10/+2
* Enable SSE (for the right subtargets)Evan Cheng2006-02-141-6/+3
* Flesh out AMD family/models.Jeff Cohen2006-01-281-2/+27
* Correctly determine CPU vendor.Jeff Cohen2006-01-281-11/+5
* Use union instead of reinterpret_cast.Jeff Cohen2006-01-281-5/+9
* Fix recognition of Intel CPUs.Jeff Cohen2006-01-281-0/+2
* Is64Bit reflects the capability of the chip, not an aspect of the target osChris Lattner2006-01-281-6/+0
* Improve X86 subtarget support for Windows and AMD.Jeff Cohen2006-01-281-38/+77
* make this work on non-native hostsChris Lattner2006-01-281-3/+7
* initialize all instance varsChris Lattner2006-01-271-3/+7
* Added a temporary option -enable-x86-sse to enable sse support. It is used byEvan Cheng2006-01-271-2/+11
* A better workaroundEvan Cheng2006-01-271-6/+5
* force sse/3dnow off until they work. This fixes all the x86 failures last nightChris Lattner2006-01-271-0/+5
* x86 CPU detection and proper subtarget supportEvan Cheng2006-01-271-41/+62
* Added preliminary x86 subtarget support.Evan Cheng2006-01-261-0/+53
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