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path: root/lib/Target/X86/X86Subtarget.cpp
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* Remove NaClModeDavid Meyer2011-10-181-7/+1
* Don't use inline assembly in 64-bit Visual Studio. Unfortunately, this means ...Craig Topper2011-10-171-8/+9
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-161-0/+5
* Add X86 feature detection support for BMI instructions. Added new cpuid funct...Craig Topper2011-10-161-18/+34
* Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper2011-10-141-0/+1
* Add X86 LZCNT instruction. Including instruction selection support.Craig Topper2011-10-111-0/+5
* Put a bunch of calls to ToggleFeature behind proper if statements.Craig Topper2011-10-101-17/+42
* Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disa...Craig Topper2011-10-091-0/+2
* Add support for MOVBE and RDRAND instructions for the assembler and disassemb...Craig Topper2011-10-031-0/+4
* Detect attempt to use segmented stacks on non ELF systems and errorRafael Espindola2011-09-071-0/+5
* Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certainNick Lewycky2011-09-051-1/+7
* Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.Eli Friedman2011-08-261-0/+2
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-2/+0
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-24/+46
* Really force on 64bit for 64-bit targets. Should fix remaining failures on u...Eli Friedman2011-07-081-3/+11
* Revert earlier unnecessary hack. Make sure we correctly force on 64bit and c...Eli Friedman2011-07-081-3/+8
* Restore old behavior. Always auto-detect features unless cpu or features are ...Evan Cheng2011-07-081-18/+5
* Default 64-bit target features and SSE2 on when a triple specifies x86-64. C...Eli Friedman2011-07-081-10/+0
* For non-x86 host, used generic as CPU name.Evan Cheng2011-07-081-5/+10
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-1/+2
* Add Mode64Bit feature and sink it down to MC layer.Evan Cheng2011-07-071-83/+32
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-071-2/+2
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-011-1/+1
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-011-1/+1
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-011-2/+8
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-4/+7
* Remove TargetOptions.h dependency from X86Subtarget.Evan Cheng2011-06-231-34/+5
* Enable autodetect of popcntMon P Wang2011-05-171-0/+1
* ADT/Triple: Renambe isOSX... methods to isMacOSX for consistency with the OSDaniel Dunbar2011-04-201-1/+2
* Target/X86: Eliminate uses of getDarwinVers().Daniel Dunbar2011-04-191-1/+1
* Stack alignment is 16 bytes on FreeBSD/i386 too.Roman Divacky2011-02-221-3/+4
* The stack should be 16 byte aligned on 32 bit solaris. Patch by Yuri.Duncan Sands2011-02-211-3/+3
* Experiment with changing the default 32-bit linux stack alignment toEric Christopher2011-01-131-3/+3
* Disable auto-detection of AVX support since AVX codegen support is not ready.Evan Cheng2010-12-131-1/+2
* Formalize the notion that AVX and SSE are non-overlapping extensions from the...Nate Begeman2010-12-101-2/+4
* Initialize HasPOPCNT.Bill Wendling2010-12-041-1/+2
* Merge System into Support.Michael J. Spencer2010-11-291-1/+1
* Use rip-rel addressing on win64 by default. For this we justAnton Korobeynikov2010-08-211-1/+1
* Add x86 CLMUL (Carry-less multiplication) cpu featureBruno Cardoso Lopes2010-07-231-3/+5
* Have the X86 backend use Triple instead of a string and some enums.Eric Christopher2010-07-051-34/+3
* fix a nasty bug where we were not treating available_externallyChris Lattner2010-06-141-3/+6
* FastISel doesn't yet handle callee-pop functions.Dan Gohman2010-05-271-0/+23
* Enable i16 to i32 promotion by default.Evan Cheng2010-04-281-6/+0
* isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.Evan Cheng2010-04-211-0/+6
* Separate out the AES-NI instructions from the SSE4.2 instructions. AddEric Christopher2010-04-021-0/+2
* Nehalem unaligned memory access is fast.Evan Cheng2010-04-011-0/+4
* Turning off post-ra scheduling for x86. It isn't a consistent win.Evan Cheng2010-03-181-9/+0
* no really, all 64-bit cpu's have cmov support. This shouldChris Lattner2010-03-141-1/+6
* Kill ModuleProvider and ghost linkage by inverting the relationship betweenJeffrey Yasskin2010-01-271-2/+2
* Implement a feature (-vector-unaligned-mem) to allow targets toDavid Greene2010-01-111-0/+1
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