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path: root/lib/Target/X86/X86Subtarget.h
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* Revert "Temporarily enable MI-Sched on X86."Andrew Trick2013-06-251-4/+1
* Temporarily enable MI-Sched on X86.Andrew Trick2013-06-241-1/+4
* This patch adds the X86FixupLEAs pass, which will reduce instructionPreston Gurd2013-04-251-0/+4
* Add support of RDSEED defined in AVX2 extensionMichael Liao2013-03-281-0/+4
* For the current Atom processor, the fastest way to handle a callPreston Gurd2013-03-271-0/+5
* Add HLE target featureMichael Liao2013-03-261-0/+4
* Add PREFETCHW codegen supportMichael Liao2013-03-261-0/+4
* Reinitialize the ivars in the subtarget so that they can be reset with the ne...Bill Wendling2013-02-161-1/+3
* Temporary revert of 175320.Bill Wendling2013-02-151-3/+1
* Reinitialize the ivars in the subtarget.Bill Wendling2013-02-151-1/+3
* Use the 'target-features' and 'target-cpu' attributes to reset the subtarget ...Bill Wendling2013-02-151-1/+7
* added basic support for Intel ADX instructionsKay Tiong Khoo2013-02-141-0/+4
* Teach SDISel to combine fsin / fcos into a fsincos node if the followingEvan Cheng2013-01-291-0/+4
* In this patch, we teach X86_64TargetMachine that it has a ILP32Eli Bendersky2013-01-251-1/+14
* Pad Short Functions for Intel AtomPreston Gurd2013-01-081-0/+5
* Revert revision 171524. Original message:Nadav Rotem2013-01-051-5/+0
* The current Intel Atom microarchitecture has a feature whereby when a functionPreston Gurd2013-01-041-0/+5
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
* Make NaCl naming consistent. The triple OSType is called NaCl and is representedEli Bendersky2012-12-041-1/+1
* Sort includes for all of the .h files under the 'lib' tree. These wereChandler Carruth2012-12-041-1/+1
* I changed hasAVX() to hasFp256() and hasAVX2() to hasInt256() in X86IselLower...Elena Demikhovsky2012-11-291-0/+2
* Add support of RTM from TSX extensionMichael Liao2012-11-081-0/+4
* misched: remove the unused getSpecialAddressLatency hook.Andrew Trick2012-10-081-6/+0
* Support for generating ELF objects on Windows.Andrew Kaylor2012-10-021-5/+8
* Remove hasNoAVX method. Can just invert hasAVX instead.Craig Topper2012-09-261-1/+0
* Generic Bypass Slow DivPreston Gurd2012-09-041-0/+5
* Introduce 'UseSSEx' to force SSE legacy encodingMichael Liao2012-08-301-0/+1
* Custom lower FMA intrinsics to target specific nodes and remove the patterns.Craig Topper2012-08-241-1/+1
* Favor FMA3 over FMA4 if both are enabled.Craig Topper2012-08-231-1/+2
* Whitespace.Chad Rosier2012-08-011-2/+2
* Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.Craig Topper2012-06-031-3/+3
* X86: Rename the CLMUL target feature to PCLMUL.Benjamin Kramer2012-05-311-3/+3
* This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd2012-04-231-0/+2
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-171-1/+1
* some comment fix for X86 and ARMJia Liu2012-02-191-1/+1
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Use LEA to adjust stack ptr for Atom. Patch by Andy Zhang.Evan Cheng2012-02-071-0/+5
* Begin fleshing out more convenience predicates in llvm::Triple andChandler Carruth2012-02-051-17/+7
* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-011-0/+24
* Remove hasXMM/hasXMMInt functions. Move callers to hasSSE1/hasSSE2. This is t...Craig Topper2012-01-101-4/+2
* Remove hasSSE*orAVX functions and change all callers to use just hasSSE*. AVX...Craig Topper2012-01-101-4/+0
* Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicate...Craig Topper2012-01-101-6/+6
* Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. Pr...Craig Topper2012-01-091-21/+15
* Remove hasSSE1orAVX(). It's the same as hasXMM().Evan Cheng2011-12-091-1/+0
* Many of the SSE patterns should not be selected when AVX is available. This l...Evan Cheng2011-12-081-0/+1
* Add XOP feature flag.Jan Sjödin2011-12-021-0/+4
* Add methods for querying minimum SSE version along with AVX. Simplifies all t...Craig Topper2011-11-221-0/+4
* Add intrinsics and feature flag for read/write FS/GS base instructions. Also ...Craig Topper2011-10-301-0/+8
* Remove NaClModeDavid Meyer2011-10-181-3/+0
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-161-0/+4
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