| Commit message (Expand) | Author | Age | Files | Lines |
* | Have the X86 backend use Triple instead of a string and some enums. | Eric Christopher | 2010-07-05 | 1 | -18/+25 |
* | FastISel doesn't yet handle callee-pop functions. | Dan Gohman | 2010-05-27 | 1 | -0/+4 |
* | Enable i16 to i32 promotion by default. | Evan Cheng | 2010-04-28 | 1 | -5/+0 |
* | isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted. | Evan Cheng | 2010-04-21 | 1 | -2/+6 |
* | Separate out the AES-NI instructions from the SSE4.2 instructions. Add | Eric Christopher | 2010-04-02 | 1 | -0/+4 |
* | Nehalem unaligned memory access is fast. | Evan Cheng | 2010-04-01 | 1 | -0/+4 |
* | Turning off post-ra scheduling for x86. It isn't a consistent win. | Evan Cheng | 2010-03-18 | 1 | -6/+0 |
* | add support for pentium class CPUs which do not have cmov, | Chris Lattner | 2010-03-14 | 1 | -0/+1 |
* | 80-col violations/trailing whitespace. | Mikhail Glushenkov | 2010-02-28 | 1 | -11/+12 |
* | Setup correct data layout to match gcc's expectations on mingw32. | Anton Korobeynikov | 2010-02-12 | 1 | -1/+1 |
* | Fix typo. | Duncan Sands | 2010-01-12 | 1 | -1/+1 |
* | Tweak commit 91745, which changed target data for both Mingw and Cygwin, | Duncan Sands | 2010-01-12 | 1 | -1/+1 |
* | Implement a feature (-vector-unaligned-mem) to allow targets to | David Greene | 2010-01-11 | 1 | -0/+5 |
* | Remove target attribute break-sse-dep. Instead, do not fold load into sse par... | Evan Cheng | 2009-12-22 | 1 | -9/+0 |
* | Bump alignment requirements for windows targets to achieve compartibility wit... | Anton Korobeynikov | 2009-12-19 | 1 | -0/+3 |
* | On recent Intel u-arch's, folding loads into some unary SSE instructions can | Evan Cheng | 2009-12-18 | 1 | -0/+9 |
* | Target-independent support for TargetFlags on BlockAddress operands, | Dan Gohman | 2009-11-20 | 1 | -0/+5 |
* | Allow target to specify regclass for which antideps will only be broken along... | David Goodwin | 2009-11-13 | 1 | -1/+1 |
* | Fixed to address code review. No functional changes. | David Goodwin | 2009-11-10 | 1 | -5/+1 |
* | Allow targets to specify register classes whose member registers should not b... | David Goodwin | 2009-11-10 | 1 | -2/+4 |
* | indicate what the native integer types for the target are. | Chris Lattner | 2009-11-07 | 1 | -3/+3 |
* | X86 needs critical path anti-dependency breaking. | Evan Cheng | 2009-10-23 | 1 | -1/+1 |
* | Allow the target to select the level of anti-dependence breaking that should ... | David Goodwin | 2009-10-22 | 1 | -1/+3 |
* | Turn on post-alloc scheduling for x86. | Evan Cheng | 2009-10-18 | 1 | -2/+1 |
* | Oops. I forgot to change the tests first. Disable post-alloc scheduling. | Evan Cheng | 2009-10-18 | 1 | -1/+1 |
* | -Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixed | Evan Cheng | 2009-10-18 | 1 | -1/+1 |
* | Change createPostRAScheduler so it can be turned off at llc -O1. | Evan Cheng | 2009-10-16 | 1 | -0/+7 |
* | Remove X86Subtarget::IsLinux. It's no longer being used. | Evan Cheng | 2009-10-15 | 1 | -8/+1 |
* | rearrange X86ATTAsmPrinter::doFinalization, making a scan of | Chris Lattner | 2009-09-16 | 1 | -1/+9 |
* | Make these functions static and local. | Daniel Dunbar | 2009-09-03 | 1 | -8/+0 |
* | X86JITInfo::getLazyResolverFunction() should not read cpu id to determine whe... | Evan Cheng | 2009-09-03 | 1 | -3/+4 |
* | Add support for modeling whether or not the processor has support for | Chris Lattner | 2009-09-02 | 1 | -0/+4 |
* | change the -x86-asm-syntax=intel/att flag to be in X86TAI | Chris Lattner | 2009-08-11 | 1 | -17/+0 |
* | Normalize Subtarget constructors to take a target triple string instead of | Daniel Dunbar | 2009-08-02 | 1 | -4/+3 |
* | remove the now-dead TM argument to these methods. | Chris Lattner | 2009-07-10 | 1 | -2/+2 |
* | make PIC vs DynamicNoPIC be explicit in PICStyles. | Chris Lattner | 2009-07-10 | 1 | -7/+15 |
* | add a couple of predicates to test for "stub style pic in PIC mode" and "stub... | Chris Lattner | 2009-07-10 | 1 | -2/+6 |
* | simplify fast isel by using ClassifyGlobalReference. This | Chris Lattner | 2009-07-10 | 1 | -6/+0 |
* | eliminate GVRequiresRegister, replacing it with predicates we | Chris Lattner | 2009-07-10 | 1 | -5/+0 |
* | move some classification logic around. Now GVRequiresExtraLoad | Chris Lattner | 2009-07-10 | 1 | -14/+17 |
* | GVRequiresExtraLoad is now never used for calls, simplify it based on this. | Chris Lattner | 2009-07-10 | 1 | -2/+1 |
* | actually, just eliminate PCRelGVRequiresExtraLoad. It makes the code | Chris Lattner | 2009-07-10 | 1 | -6/+0 |
* | There is only one case where GVRequiresExtraLoad returns true for calls: | Chris Lattner | 2009-07-10 | 1 | -1/+7 |
* | the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it. | Chris Lattner | 2009-07-10 | 1 | -3/+2 |
* | When in -static mode, force the PIC style to none. Doing this requires fixing | Chris Lattner | 2009-07-09 | 1 | -2/+6 |
* | Fix a subtarget feature bug. | David Greene | 2009-06-29 | 1 | -1/+1 |
* | Add feature flags for AVX and FMA and fix some SSE4A feature flag | David Greene | 2009-06-26 | 1 | -3/+15 |
* | cosmetic changes. | Chris Lattner | 2009-06-21 | 1 | -1/+1 |
* | Update CPU capabilities for AMD machines | Stefanus Du Toit | 2009-05-26 | 1 | -0/+4 |
* | Propagate CPU string out of SubtargetFeatures | Anton Korobeynikov | 2009-05-23 | 1 | -1/+2 |