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path: root/lib/Target/X86/X86Subtarget.h
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* Have the X86 backend use Triple instead of a string and some enums.Eric Christopher2010-07-051-18/+25
* FastISel doesn't yet handle callee-pop functions.Dan Gohman2010-05-271-0/+4
* Enable i16 to i32 promotion by default.Evan Cheng2010-04-281-5/+0
* isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.Evan Cheng2010-04-211-2/+6
* Separate out the AES-NI instructions from the SSE4.2 instructions. AddEric Christopher2010-04-021-0/+4
* Nehalem unaligned memory access is fast.Evan Cheng2010-04-011-0/+4
* Turning off post-ra scheduling for x86. It isn't a consistent win.Evan Cheng2010-03-181-6/+0
* add support for pentium class CPUs which do not have cmov,Chris Lattner2010-03-141-0/+1
* 80-col violations/trailing whitespace.Mikhail Glushenkov2010-02-281-11/+12
* Setup correct data layout to match gcc's expectations on mingw32.Anton Korobeynikov2010-02-121-1/+1
* Fix typo.Duncan Sands2010-01-121-1/+1
* Tweak commit 91745, which changed target data for both Mingw and Cygwin,Duncan Sands2010-01-121-1/+1
* Implement a feature (-vector-unaligned-mem) to allow targets toDavid Greene2010-01-111-0/+5
* Remove target attribute break-sse-dep. Instead, do not fold load into sse par...Evan Cheng2009-12-221-9/+0
* Bump alignment requirements for windows targets to achieve compartibility wit...Anton Korobeynikov2009-12-191-0/+3
* On recent Intel u-arch's, folding loads into some unary SSE instructions canEvan Cheng2009-12-181-0/+9
* Target-independent support for TargetFlags on BlockAddress operands,Dan Gohman2009-11-201-0/+5
* Allow target to specify regclass for which antideps will only be broken along...David Goodwin2009-11-131-1/+1
* Fixed to address code review. No functional changes.David Goodwin2009-11-101-5/+1
* Allow targets to specify register classes whose member registers should not b...David Goodwin2009-11-101-2/+4
* indicate what the native integer types for the target are.Chris Lattner2009-11-071-3/+3
* X86 needs critical path anti-dependency breaking.Evan Cheng2009-10-231-1/+1
* Allow the target to select the level of anti-dependence breaking that should ...David Goodwin2009-10-221-1/+3
* Turn on post-alloc scheduling for x86.Evan Cheng2009-10-181-2/+1
* Oops. I forgot to change the tests first. Disable post-alloc scheduling.Evan Cheng2009-10-181-1/+1
* -Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixedEvan Cheng2009-10-181-1/+1
* Change createPostRAScheduler so it can be turned off at llc -O1.Evan Cheng2009-10-161-0/+7
* Remove X86Subtarget::IsLinux. It's no longer being used.Evan Cheng2009-10-151-8/+1
* rearrange X86ATTAsmPrinter::doFinalization, making a scan of Chris Lattner2009-09-161-1/+9
* Make these functions static and local.Daniel Dunbar2009-09-031-8/+0
* X86JITInfo::getLazyResolverFunction() should not read cpu id to determine whe...Evan Cheng2009-09-031-3/+4
* Add support for modeling whether or not the processor has support forChris Lattner2009-09-021-0/+4
* change the -x86-asm-syntax=intel/att flag to be in X86TAI Chris Lattner2009-08-111-17/+0
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-4/+3
* remove the now-dead TM argument to these methods.Chris Lattner2009-07-101-2/+2
* make PIC vs DynamicNoPIC be explicit in PICStyles.Chris Lattner2009-07-101-7/+15
* add a couple of predicates to test for "stub style pic in PIC mode" and "stub...Chris Lattner2009-07-101-2/+6
* simplify fast isel by using ClassifyGlobalReference. ThisChris Lattner2009-07-101-6/+0
* eliminate GVRequiresRegister, replacing it with predicates we Chris Lattner2009-07-101-5/+0
* move some classification logic around. Now GVRequiresExtraLoadChris Lattner2009-07-101-14/+17
* GVRequiresExtraLoad is now never used for calls, simplify it based on this.Chris Lattner2009-07-101-2/+1
* actually, just eliminate PCRelGVRequiresExtraLoad. It makes the codeChris Lattner2009-07-101-6/+0
* There is only one case where GVRequiresExtraLoad returns true for calls:Chris Lattner2009-07-101-1/+7
* the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it.Chris Lattner2009-07-101-3/+2
* When in -static mode, force the PIC style to none. Doing this requires fixingChris Lattner2009-07-091-2/+6
* Fix a subtarget feature bug.David Greene2009-06-291-1/+1
* Add feature flags for AVX and FMA and fix some SSE4A feature flagDavid Greene2009-06-261-3/+15
* cosmetic changes.Chris Lattner2009-06-211-1/+1
* Update CPU capabilities for AMD machinesStefanus Du Toit2009-05-261-0/+4
* Propagate CPU string out of SubtargetFeaturesAnton Korobeynikov2009-05-231-1/+2