| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add assembler dialect attribute in asm parser which lets target specific asm ... | Devang Patel | 2012-01-31 | 1 | -4/+3 |
| * | Remove pcmpgt/pcmpeq intrinsics as clang is not using them. | Craig Topper | 2012-01-31 | 1 | -20/+0 |
| * | PR11834: Use macros which are defined on Windows. Patch by Marina Yatsina. | Evan Cheng | 2012-01-30 | 2 | -2/+4 |
| * | Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,... | Devang Patel | 2012-01-30 | 1 | -2/+4 |
| * | Intel syntax. Support .intel_syntax directive. | Devang Patel | 2012-01-30 | 1 | -10/+24 |
| * | Fix refacto. | Benjamin Kramer | 2012-01-30 | 1 | -2/+2 |
| * | Eliminate narrowing conversion in initializer list, to make C++11 happy | Douglas Gregor | 2012-01-30 | 1 | -2/+2 |
| * | X86: Simplify shuffle mask generation code. | Benjamin Kramer | 2012-01-30 | 1 | -53/+34 |
| * | Fix pattern for memory form of PSHUFD for use with FP vectors to remove bitca... | Craig Topper | 2012-01-30 | 2 | -10/+3 |
| * | Move some XOP patterns into instruction definition. Replae VPCMOV intrinsic p... | Craig Topper | 2012-01-30 | 4 | -452/+252 |
| * | Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320] | Devang Patel | 2012-01-27 | 1 | -3/+5 |
| * | Move some patterns back near their instructions and use AddedComplexity to fi... | Craig Topper | 2012-01-27 | 1 | -49/+41 |
| * | Keep source location information for X86 MCFixup's. | Jim Grosbach | 2012-01-27 | 2 | -18/+23 |
| * | Handle call-clobbered ymm registers on Win64. | Jakob Stoklund Olesen | 2012-01-26 | 2 | -1/+8 |
| * | Fix for the following bug in AVX codegen for double-to-int conversions: | Victor Umansky | 2012-01-26 | 1 | -2/+2 |
| * | Add HasXOP predicate check covering a bunch of XOP intrinsic patterns. | Craig Topper | 2012-01-26 | 1 | -0/+2 |
| * | Fix AVX vs SSE patterns ordering issue for VPCMPESTRM and VPCMPISTRM. | Craig Topper | 2012-01-26 | 1 | -2/+4 |
| * | Remove some more patterns by custom lowering intrinsics to target specific no... | Craig Topper | 2012-01-26 | 2 | -25/+14 |
| * | fix a bug I introduced in r148929, this is not a splat! | Chris Lattner | 2012-01-25 | 1 | -1/+5 |
| * | Custom lower PSIGN and PSHUFB intrinsics to their corresponding target specif... | Craig Topper | 2012-01-25 | 4 | -74/+49 |
| * | use ConstantVector::getSplat in a few places. | Chris Lattner | 2012-01-25 | 1 | -24/+14 |
| * | Custom lower phadd and phsub intrinsics to target specific nodes. Remove the ... | Craig Topper | 2012-01-25 | 3 | -63/+70 |
| * | Remove AVX 256-bit unaligned load intrinsics. 128-bit versions had been remov... | Craig Topper | 2012-01-25 | 1 | -4/+0 |
| * | Merge intrinsic pattern and no pattern versions of VCVTSD2SI intruction defin... | Craig Topper | 2012-01-25 | 1 | -24/+5 |
| * | Intel Syntax: Extend special hand coded logic, to recognize special instructi... | Devang Patel | 2012-01-24 | 1 | -5/+15 |
| * | ZERO_EXTEND operation is optimized for AVX. | Elena Demikhovsky | 2012-01-24 | 1 | -2/+37 |
| * | Add comments near load pattern fragments indicating that all integer vector l... | Craig Topper | 2012-01-24 | 1 | -0/+6 |
| * | Fix typo. | Devang Patel | 2012-01-23 | 1 | -1/+1 |
| * | Intel syntax: Robustify parsing of memory operand's displacement experssion. | Devang Patel | 2012-01-23 | 1 | -2/+7 |
| * | Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI] | Devang Patel | 2012-01-23 | 1 | -6/+16 |
| * | Intel syntax: Parse segment registers. | Devang Patel | 2012-01-23 | 1 | -4/+16 |
| * | Custom lower PCMPEQ/PCMPGT intrinsics to target specific nodes and remove the... | Craig Topper | 2012-01-23 | 2 | -301/+165 |
| * | Update more places to use target specific nodes for vector shifts instead of ... | Craig Topper | 2012-01-23 | 1 | -42/+19 |
| * | Custom lower vector shift intrinsics to target specific nodes and remove the ... | Craig Topper | 2012-01-23 | 2 | -385/+156 |
| * | Remove pattern fragments for v32i8, v16i16, v8i32, v16i8, v8i16, and v4i32 lo... | Craig Topper | 2012-01-23 | 2 | -30/+2 |
| * | Combine X86 CMPPD and CMPPS node types. Simplifies selection code and pattern... | Craig Topper | 2012-01-22 | 4 | -25/+26 |
| * | Merge PCMPEQB/PCMPEQW/PCMPEQD/PCMPEQQ and PCMPGTB/PCMPGTW/PCMPGTD/PCMPGTQ X86... | Craig Topper | 2012-01-22 | 4 | -87/+66 |
| * | Add target specific ISD node types for SSE/AVX vector shuffle instructions an... | Craig Topper | 2012-01-22 | 4 | -273/+410 |
| * | Make code a little less verbose. | Craig Topper | 2012-01-22 | 1 | -7/+5 |
| * | Remove unused X86 ISD node type defines. | Craig Topper | 2012-01-22 | 2 | -8/+0 |
| * | Move some vector shift patterns into their instruction definitions. | Craig Topper | 2012-01-22 | 1 | -48/+42 |
| * | Add memory patterns for some of the fp<->integer conversion instructions. Fol... | Craig Topper | 2012-01-21 | 1 | -24/+28 |
| * | Remove unused variables. | Benjamin Kramer | 2012-01-21 | 1 | -2/+0 |
| * | Fix PR11819 introduced by r148537. I'd commit the test case, but the generate... | Craig Topper | 2012-01-21 | 1 | -2/+2 |
| * | Intel syntax: Robustify register parsing. | Devang Patel | 2012-01-20 | 1 | -28/+16 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 9 | -56/+32 |
| * | Intel syntax: Parse ... PTR [-8] | Devang Patel | 2012-01-20 | 1 | -0/+5 |
| * | Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax. | Devang Patel | 2012-01-20 | 1 | -1/+3 |
| * | Improve 256-bit shuffle splitting to allow 2 sources in each 128-bit lane. As... | Craig Topper | 2012-01-20 | 1 | -86/+86 |
| * | Add support for selecting 256-bit PALIGNR. | Craig Topper | 2012-01-20 | 2 | -24/+81 |
